Patents by Inventor Peter N. Wood
Peter N. Wood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7321210Abstract: Disclosed is a variable speed brushless direct current (BLDC) motor drive circuit. The circuit includes a plurality of high-side and low-side controlled switches coupled in a three-phase bridge configuration for commutating a BLDC motor, each phase of the bridge being connected to a corresponding phase of the motor, a controller for providing a drive signal to drive each of the high-side and low-side switches, and a speed control loop for controlling the motor by PWM of a DC bus voltage to achieve a constant motor speed.Type: GrantFiled: April 3, 2006Date of Patent: January 22, 2008Assignee: International Rectifier CorporationInventor: Peter N Wood
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Patent number: 7102625Abstract: A cradle is arranged to be clipped onto or otherwise removably secured to a writing instrument, and to hold a camera or other optical image capture device so that images of marks made by the writing instrument may be captured and transmitted to a processor for remote display, storage, and/or processing.Type: GrantFiled: May 14, 2002Date of Patent: September 5, 2006Inventor: Peter N. Woods
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Publication number: 20030214489Abstract: A cradle is arranged to be clipped onto or otherwise removably secured to a writing instrument, and to hold a camera or other optical image capture device so that images of marks made by the writing instrument may be captured and transmitted to a processor for remote display, storage, and/or processing.Type: ApplicationFiled: May 14, 2002Publication date: November 20, 2003Inventor: Peter N. Woods
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Patent number: 6002213Abstract: A MOS gate drive (MGD) integrated circuit drives a pair of MOS gated power semiconductor devices such as are used in a half bridge circuit to drive a load in a resonant power supply circuit or to drive a gas discharge lamp in a ballast circuit. The gate drive circuit includes dead time circuitry which prevents simultaneous conduction in both MOS gated devices. The duration of the dead time is controlled in response to a feedback signal that is sensed from the output supplied to the load or the lamp. A dimming function is attained by controlling the voltage of the feedback signal.Type: GrantFiled: September 13, 1996Date of Patent: December 14, 1999Assignee: International Rectifier CorporationInventor: Peter N. Wood
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Patent number: 5932974Abstract: A lamp ballast circuit drives at least one gas discharge illumination device and includes first and second MOS-gated power semiconductor devices connected in a half-bridge configuration and coupled across a d-c supply with a common terminal located at the node between the devices for supplying an output signal to the illumination device. A self-oscillating driver circuit includes respective outputs for driving the power semiconductor devices and has at least one operating voltage supply terminal. When the illumination device fails or is removed, a protection circuit, electrically coupled to the illumination device, removes the operating voltage supplied to the supply terminal. The protection circuit includes a transformer/inductor coupled to the illumination device or a switch that is responsive to the voltage across the illumination device. Additionally, a soft-starting circuit can be provided for gradually increasing the voltage across the illumination device prior to igniting the illumination device.Type: GrantFiled: May 30, 1997Date of Patent: August 3, 1999Assignee: International Rectifier CorporationInventor: Peter N. Wood
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Patent number: 5805433Abstract: A power supply includes a half bridge transistor circuit coupled across a DC bus, where the half bridge transistor circuit includes a high-side transistor and a low-side transistor and produces an output pulse width modulation (PWM) signal and a self oscillating half bridge driver circuit for producing first and second control PWM signals in response to an external threshold signal. The first control PWM signal is coupled to a control terminal of the high-side transistor and the second control PWM signal is coupled to a control terminal of the low-side transistor. The power supply also includes a low pass filter for receiving the output PWM signal and producing a DC output voltage therefrom across a pair of output terminals and a programmable voltage regulating device having an input terminal coupled to the DC output voltage and an output terminal coupled to the external threshold voltage.Type: GrantFiled: April 16, 1997Date of Patent: September 8, 1998Assignee: International Rectifier CorporationInventor: Peter N. Wood
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Patent number: 5796215Abstract: A half bridge driver chip for driving a resonant load, such as a ballast, has first and second pairs to which an oscillation frequency timing circuit, matched to the resonant frequency of the load. A constant voltage drop circuit is connected to these input pins to vary the voltage at the pins as a linear function of the input voltage V.sub.cc. Consequently, when V.sub.cc is increasing during the start-up of the circuit, the resonant frequency is initially high but decreases to its operation value as V.sub.cc increases. This produces a soft start characteristic and a timed preheat cycle of the resonant load. In one embodiment, the constant voltage drop circuit is a zener diode; in another embodiment, it is strings of anti-parallel connected diodes.Type: GrantFiled: June 28, 1996Date of Patent: August 18, 1998Assignee: International Rectifier CorporationInventors: John Edward Parry, Peter N. Wood
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Patent number: 5757141Abstract: A monolithic MOS gate driver chip is described for driving high side and low side power MOSFETs in a gas discharge lamp ballast circuit. The chip includes a timer circuit for generating a square output at the natural frequency of resonance of the lamp ballast. Dead time circuits are provided in the chip to prevent the simultaneous conduction of both high side and low side MOSFETs. The chip may be housed in a right pin DIP package.Type: GrantFiled: August 9, 1996Date of Patent: May 26, 1998Assignee: International Rectifier CorporationInventor: Peter N. Wood
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Patent number: 5747943Abstract: A monolithic MOS gate driver chip is described for driving high side and low side power MOSFETs in a gas discharge lamp ballast circuit. The chip includes a timer circuit for generating a square output at the natural frequency of resonance of the lamp ballast. Dead time circuits are provided in the chip to prevent the simultaneous conduction of both high side and low side MOSFETs. The chip may be housed in an eight pin DIP package.Type: GrantFiled: August 26, 1996Date of Patent: May 5, 1998Assignee: International Rectifier CorporationInventors: Talbott M. Houk, Peter N. Wood
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Patent number: 5559394Abstract: A monolithic MOS gate driver chip is described for driving high side and low side power MOSFETs in a gas discharge lamp ballast circuit. The chip includes a timer circuit for generating a square output at the natural frequency of resonance of the lamp ballast. Dead time circuits are provided in the chip to prevent the simultaneous conduction of both high side and low side MOSFETs. The chip may be housed in a right pin DIP package.Type: GrantFiled: August 11, 1995Date of Patent: September 24, 1996Assignee: International Rectifier CorporationInventor: Peter N. Wood
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Patent number: 5545955Abstract: A monolithic MOS gate driver chip is described for driving high side and low side power MOSFETs in a gas discharge lamp ballast circuit. The chip includes a timer circuit for generating a square output at the natural frequency of resonance of the lamp ballast. Dead time circuits are provided in the chip to prevent the simultaneous conduction of both high side and low side MOSFETs. The chip may be housed in a right pin DIP package.Type: GrantFiled: March 4, 1994Date of Patent: August 13, 1996Assignee: International Rectifier CorporationInventor: Peter N. Wood
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Patent number: 5387847Abstract: A ballast for a gas discharge lamp circuit has a d-c output which contains three series-connected diodes connected across the output terminals, a pair of capacitors connected from different respective nodes of the diodes to respective ones of the output terminals, and a resistor connected between two of the diodes. The resistor increases the circuit power factor to greater than 0.95.Type: GrantFiled: March 4, 1994Date of Patent: February 7, 1995Assignee: International Rectifier CorporationInventor: Peter N. Wood
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Patent number: 4511815Abstract: A high power MOSFET switching circuit which has a larger duty cycle is driven from the output winding of a saturable isolation transformer. The output winding is coupled to the gate of the MOSFET power switch through a series connected control MOSFET device having an inherent parallel-connected diode. The gate capacitance is charged through the diode and is discharged through the control MOSFET when it is turned on. The drive circuit is a low impedance circuit with full isolation between input and output terminals.Type: GrantFiled: August 15, 1983Date of Patent: April 16, 1985Assignee: International Rectifier CorporationInventor: Peter N. Wood