Patents by Inventor Peter Nikolsky

Peter Nikolsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for separating a circuit pattern into multiple circuit patterns
    Patent number: 8111901
    Abstract: A method for separating an original circuit pattern to be printed on a wafer, into multiple circuit patterns is disclosed. Simulation to obtain an image log-slope (ILS), normalized image log-slope (NILS), or any other characteristic of an image quality on edges of polygons in the circuit pattern obtained from circuit pattern data is performed. Properly printed edges and not-properly printed edges are identified according to a criterion of an ILS level. The original circuit pattern is separated into multiple circuit patterns such that each of the multiple patterns does not have any not-properly printed edges.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: February 7, 2012
    Assignee: ASML Masktools B.V.
    Inventor: Peter Nikolsky
  • Apparatus and method for separating a circuit pattern into multiple circuit patterns
    Publication number: 20080037861
    Abstract: A method for separating an original circuit pattern to be printed on a wafer, into multiple circuit patterns is disclosed. Simulation to obtain an image log-slope (ILS), normalized image log-slope (NILS), or any other characteristic of an image quality on edges of polygons in the circuit pattern obtained from circuit pattern data is performed. Properly printed edges and not-properly printed edges are identified according to a criterion of an ILS level. The original circuit pattern is separated into multiple circuit patterns such that each of the multiple patterns does not have any not-properly printed edges.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 14, 2008
    Inventor: Peter Nikolsky