Patents by Inventor Peter Norrman

Peter Norrman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • NOVEL INSULIN ANALOGUES AND USES THEREOF
    Publication number: 20240141011
    Abstract: The present invention is in the therapeutic field of drugs for medical conditions relating to diabetes. More specifically the invention relates to insulin analogues of human insulin. The invention provides pharmaceutical compositions comprising such insulin analogues and the uses if the such analogues for the treatment or prevention of medical conditions relating to diabetes.
    Type: Application
    Filed: December 15, 2023
    Publication date: May 2, 2024
    Inventors: Frantisek Hubalek, Mathias Norrman, Helle Birk Olsen, Peter Madsen, Thomas Boerglum Kjeldsen, Jeppe Sturis
  • PURIFICATION OF POLY A-TAGGED PRODUCTS
    Publication number: 20240076650
    Abstract: The invention relates to processes for purification of poly-tagged products, such as mRNA, from synthetic or biological compositions. The process involves contacting the composition with a oligo d (T)-functionalized chromatography medium comprising a convection-based chromatography material.
    Type: Application
    Filed: January 26, 2022
    Publication date: March 7, 2024
    Inventors: Peter Lundback, Ronnie Palmgren, Ola Lind, Nils Norrman, Helen Cheek, Susana Brito Dos Santos, Per Denker
  • Static cache
    Patent number: 6865736
    Abstract: The present invention discloses a processor system comprising a processor (31) and at least a first memory (32) and a second memory (34, 36, 37). The first memory (32) is normally faster than the second one, and means for memory allocation (38, 41, 48) perform the periodically static allocation of data into the first memory (32). The means for memory allocation (38, 41, 48) are run-time updateable by software. An execution profiling section (39) is provided for continuously or intermittently providing execution data used for updating the means for memory allocation (38, 41, 48). According to the invention, the memory allocation is performed on a variable or record (49, 50) level. The means for memory allocation preferably use linking tables (41, 48) supporting dynamic software changes. The first memory (32) is preferably an SRAM, connected to the processor by a dedicated bus (33).
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: March 8, 2005
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Per Anders Holmberg, Peter Norrman, Leif Karl Johansson, Terje Egeland
  • Static cache
    Publication number: 20010021959
    Abstract: The present invention discloses a processor system comprising a processor (31) and at least a first memory (32) and a second memory (34, 36, 37). The first memory (32) is normally faster than the second one, and means for memory allocation (38, 41, 48) perform the periodically static allocation of data into the first memory (32). The means for memory allocation (38, 41, 48) are run-time updateable by software. An execution profiling section (39) is provided for continuously or intermittently providing execution data used for updating the means for memory allocation (38, 41, 48). According to the invention, the memory allocation is performed on a variable or record (49, 50) level. The means for memory allocation preferably use linking tables (41, 48) supporting dynamic software changes. The first memory (32) is preferably an SRAM, connected to the processor by a dedicated bus (33).
    Type: Application
    Filed: February 16, 2001
    Publication date: September 13, 2001
    Inventors: Per Anders Holmberg, Peter Norrman, Leif Karl Johansson, Terje Egeland