Abstract: A separately replaceable printed circuit board or card for use in a shelf of a telecommunications system with plural twisted pairs connected to corresponding plural subscribers via said card, each subscriber channel on each card including a low pass filter connected both to POTS and broadband services.

Abstract: A telecommunications rack has one or more shelves connected to a narrowband network and to a broadband network for serving a plurality of subscribers. Line termination and network termination equipment are interconnected by a bus internal to the shelf for providing subscriber access. One half of a redundant equipment pair can be placed in one shelf and the other half in another shelf in a same rack for sharing network termination equipment between such shelves. The rack or shelf in the rack can be used as a hub for connecting to a remote shelf or housing that includes the line termination equipment for connection to subscribers.

Abstract: An xDSL (x-Digital Subscriber Line) signal is multiplexed with POTS on a twisted pair between a subscriber modem and line termination equipment in a shelf that also includes network termination equipment for connection to a broadband network. The line termination and network termination equipment are interconnected by a bus internal to the shelf for providing subscriber access. Separate lowpass filters are provided at each end of a twisted wire pair between the shelf and each subscriber equipment. A shelf can be used as a hub for connecting to a remote shelf that includes the line termination equipment for connection to subscribers.

Abstract: Line termination equipment may include a replaceable printed circuit board or card for use in a shelf of a telecommunications system with plural twisted pairs connected to corresponding plural subscribers via said card, each subscriber channel on each card including a hybrid circuit connected to one of the plural twisted pairs, a highpass filter, a modulator/encoder and a demodulator/decoder.

Abstract: A telecommunications rack has one or more shelves connected to a narrowband network and to a broadband network for serving a plurality of subscribers. Line termination and network termination equipment are interconnected by a bus internal to the shelf for providing subscriber access. One half of a redundant equipment pair can be placed in one shelf and the other half in another shelf in a same rack for sharing network termination equipment between such shelves. The rack or shelf in the rack can be used as a hub for connecting to a remote shelf or housing that includes the line termination equipment for connection to subscribers.

Abstract: Line termination equipment may include a replaceable printed circuit board or card for use in a shelf of a telecommunications system with plural twisted pairs connected to corresponding plural subscribers via said card, each subscriber channel on each card including a hybrid circuit connected to one of the plural twisted pairs, a highpass filter, a modulator/encoder and a demodulator/decoder.

Abstract: An xDSL (x-Digital Subscriber Line) signal is multiplexed with POTS on a twisted pair between a subscriber modem and line termination equipment in a shelf that also includes network termination equipment for connection to a broadband network. The line termination and network termination equipment are interconnected by a bus internal to the shelf for providing subscriber access. Separate lowpass filters are provided at each end of a twisted wire pair between the shelf and each subscriber equipment. A shelf can be used as a hub for connecting to a remote shelf that includes the line termination equipment for connection to subscribers.

Abstract: Line termination equipment may include a replaceable printed circuit board or card for use in a shelf of a telecommunications system with plural twisted pairs connected to corresponding plural subscribers via said card, each subscriber channel on each card including a hybrid circuit connected to one of the plural twisted pairs, a highpass filter, a modulator/encoder and a demodulator/decoder.

Abstract: An architecture, as well as various components, of an asynchronous transfer mode (ATM) subscriber access multiplexer (ASAM) system can be implemented using an XDSL (x-Digital Subscriber Line) using DMT (Discrete Multitone) or CAP (Carrierless Amplitude Phase Modulation) between a plurality of subscribers and a corresponding plurality of line termination equipment in a shelf that also includes network termination equipment for connection to an ATM network. The line termination and network termination equipment are interconnected by a bus internal to the shelf for providing subscriber access. Separate lowpass filters are provided at each end of a twisted wire pair between the shelf and each subscriber equipment. A shelf can be used as a hub for connecting to a remote shelf that includes the line termination equipment for connection to subscribers.

Abstract: For synchronisation purposes, a transmitter (TX) multiplexes a pilot carrier with carriers whereon data elements (DATA) are modulated, and transmits the pilot carrier together with the modulated carriers to a receiver (RX). The immunity of the pilot carrier for interferers, such as radio amateur signals, is improved by modulating the pilot carrier with a non-constant signal, for instance a random signal, an alternating signal or even scrambled data elements (DATA), before transmission thereof. Since demodulation of the pilot carrier in the receiver (RX) and averageing successive demodulated pilot carriers reduces the effect of the interference induced on the non-constantly modulated pilot carrier, the degradation of the synchronisation between transmitter (TX) and receiver (RX) is reduced significantly.

Abstract: The present invention relates to a for coupling Plain Old Telephone Service (POTS) signals and Asymmetric Digital Subscriber Line (ADSL) signals to a common line (TL). In order to avoid saturation of inductances (L1,L2,L3,L4) of a low pass POTS filter (LPF) located between the POTS transmitter/receiver (PTR) and this common line (TL) when the POTS signal is not sufficiently attenuated by this common line (TL), a variable impedance (SL) is inserted between the POTS transmitter/receiver (PTR) and this low pass POTS filter (LPF). The value of this variable impedance (SL) is controlled by a control signal (CS) supplied by the ADSL transmitter/receiver (ATR) which measures the attenuation caused by this common line (TL).

Abstract: A digital phase locked loop arrangement is used in a desynchronizer demapping a plesiochronous stream from a synchronous bitstream is disclosed to remove jitter due to overhead gapping from the plesiochronous stream. To this end the part of the synchronous bitstream constituting the plesiochronous stream is written into a buffer memory (BUFF), the write address (WRADDR) of which is incremented at the rate of this plesiochronous part. The read address (RDADDR) for the buffer memory (BUFF) is derived from the write address (WRADDR) in the digital phase locked loop arrangement. Herein, a negative feedback for byte justifications in the synchronous bitstream and a positive feedback for bit justifications therein is provided so that byte justifications give rise to a lower change in the incrementing rate of the read address (RDADDR) but of longer duration, whereas bit justifications give rise to an increased change in this incrementing rate but of shorter duration.

Abstract: A data transmission system is proposed in which an auxiliary bitstream of low bitrate (AUX) is coded together with a main bitstream of high bitrate (PRIM) without increasing the transmission rate above the high bitrate. This auxiliary bitstream (AUX) is moreover transmitted synchronously with the main bitstream (PRIM). Transmitter (T) divides the main bitstream (PRIM) in periodically occurring blocks of Y bits and codes one bit of the auxiliary bitstream (AUX) in each of the blocks by using a first (AMI) or a second (VAMI) coding law according to the binary value of that bit. The second law is constructed by violating the first coding law (AMI) according to a predetermined violation law. Redundancy in the first coding law (AMI) is used to introduce symbol sequences not permitted under this first coding law (AMI) and to so obtain the second coding law (VAMI).

Abstract: A decoder device (VD) used for decoding digital messages according to the Viterbi convolutional decoding algorithm. This Viterbi decoder (VD) may be integrated in a portion of a single electronic chip for inclusion in a receiver of a handportable mobile station of a digital cellular radio system. The decoder (VD) includes a first module (VITALFA) to calculate transition probabilities for the possible state transitions between two successive states of the decoder, and a second module (VIPROB) to calculate, as a function of the state transition probabilities, path probabilities for the possible paths constituted by successive state transitions and ending in each of these states, and to select the path having the highest path probability value.

Abstract: A multi-sample multi-channel digital decimator filter producing a Finite Impulse filtering Response (FIR) from 128 digital filter coefficients for 4 independent channels with a decimation ratio of 32, i.e. each from 1,024 kHz 1-bit inputs to 32 kHz multibit outputs, splits cyclically the coefficient values in 16 groups of 8, according to the coefficient positions, into 4 Read Only Memory modules (0, 1, 2, 3). The Read Only Memory modules are coupled to the 4 multipliers (MULT 0, 1, 2, 3), wherein the coefficient value is multiplied by that of the input bit, through a multiplexer (MUXI) being able to cycle through 4 distinct conditions. The 4 adder accumulators (ACC 0, 1, 2, 3) are coupled to the outputs of their respective channel multipliers. They each partially compute in parallel outputs words using one sixteenth of the coefficients and the multiplexer rotates these words, thereby enabling complete computation in 4 cycles.

Abstract: A signal generator for generating a modulated output signal from a clock signal. The generator comprises a divider means which derives from the clock signal a square wave having a first fundamental frequency. Means connected to the divider means also provides from the clock signal a rectangular wave signal having a second fundamental frequency that is an even integral multiple of the first fundamental frequency. A chopper chops the square wave signal by the rectangular wave signal to provide the output signal. The frequency content of the spectrum of the output signal is the same as that of the square wave signal.

Abstract: A prior art digital Delta-Sigma converter is improved by including a second control loop with a second forward branch coupled between the first and second subtractor circuits and a third subtractor circuit coupled in series to the first integrator circuit and with a second feedback branch and a third subtractor circuit coupled to the output of said first integrator circuit. When the input signal is equal to zero the output signal of the first integrator circuit will rapidly change to zero because the second control loop applies an additional feedback signal to the third subtractor circuit and therefore also to the first integrator circuit. Because the output signal of the first integrator output circuit signal thus more rapidly varies to zero the same is true for the output signal of the second integrator circuit and therefore also for the converter output signal.