Abstract: A plurality of N-doped strip portions are formed alternating with a plurality of P-doped regions. When a voltage is applied to the N-doped strip portions, a capacitance is created between the N-doped strip portions and the P-doped strip portions. A capacitance is also created between the N-doped strip portions and the underlying epitaxial silicon layer. A larger interface area between N-doped and P-doped regions generally increases the capacitance. By providing the N-doped strip portions, as opposed to a continuous N-doped region, the combined interface area between the N-doped strip portions and the underlying epitaxial silicon layer is reduced. However, more interface area is provided between the N-doped strip portions and the P-doped strip portions. A circuit simulation indicates that junction capacitance per unit peripheral length is 0.41 fF/?m, while the junction capacitance per unit area is 0.19 fF/?m^2.