Patents by Inventor Peter P. R. Connell

Peter P. R. Connell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4587483
    Abstract: The circuit arrangement described measures the time when a frequency F.sub.o, changing towards a desired frequency value, differs by not more than a predetermined amount (e.g. 100 Hz) from the desired value. Initially F.sub.o is mixed with the sum of 10 MHz and the new desired value for F.sub.o. The lower sideband is selected and thus produces a frequency F.sub.1 which is thus always 10 MHz when F.sub.o reaches its desired value (which may be variable). The circuit therefore has to measure when F.sub.1 comes within 100 Hz of 10 MHz. Initially F.sub.1 is multiplied by a predetermined multiplication factor (.times.100) and the product subtracted from a reference frequency. The latter is the sum of a fixed frequency of 300 KHz and of 10 GHz (i.e. 10 MHz multiplied by 100). This therefore produces an output frequency F.sub.2 whose value differs from 300 KHz by 100 Hz.times.100 (or 10 KHz) when F.sub.1 differs from 10 MHz by 100 Hz.
    Type: Grant
    Filed: September 26, 1983
    Date of Patent: May 6, 1986
    Assignee: RACAL-DANA Instruments, Ltd.
    Inventors: Peter P. R. Connell, Michael Yeomans
  • Patent number: 4422053
    Abstract: A synthesizer is disclosed having a frequency modulation phase-locked loop incorporating a voltage controlled oscillator (VCO) producing a 100 MHz, say, carrier which can be frequency-modulated. The VCO output is combined in a mixer with the output of another VCO which is variable stepwise. A frequency divider with a division factor of, say, 10, can be selectively interposed in the output of the VCO by means of a switch, and the resultant divided output is summed with a fixed frequency of, say, 90 MHz so as bring the output back to the 100 MHz carrier frequency. In this way, not only is the FM reduced by a factor of 10 (in this example) but so is the noise.
    Type: Grant
    Filed: September 8, 1981
    Date of Patent: December 20, 1983
    Assignee: Racal-Dana Instruments Limited
    Inventors: David Brewerton, Peter P. R. Connell
  • Patent number: 4322692
    Abstract: A microprocessor-controlled synthesizer has a low frequency section producing a first output frequency and a comb loop producing a second output frequency. The comb loop includes a multiplier which produces harmonics of 100 MHz one of which is selected and fed to a mixer in a phase-locked loop having a variable divider, the other input of the mixer being a VCO output frequency. At low values of the second output frequency, the phase detector locks to the difference output from the mixer, at higher values to the sum output. The output from the mixer is mixed in a second mixer with the output of a further VCO, and a second phase detector selects the sum output from the second mixer to cover the first half of each decade of MHz and selects the difference output to cover the second half of the decade.
    Type: Grant
    Filed: February 21, 1980
    Date of Patent: March 30, 1982
    Assignee: Racal-Dana Instruments Limited
    Inventors: David Brewerton, Peter P. R. Connell