Abstract: Examples are disclosed for a device having at least two media access controllers. In some examples, a first media access controller may be coupled to a host computing device. A second media access controller may be coupled to one or more processor circuits arranged to perform packet processing of data payloads for one or more data frames forwarded through the first media access controller and/or forwarded through the second media access controller. The first media access controller may be coupled to the second media access controller via a communication link. Other examples are described and claimed.

Abstract: Described are embodiments of mediums, methods, and systems for application-reserved use of cache for direct I/O. A method for using application-reserved cache may include reserving, by one of a plurality of cores of a processor, use of a first portion of one of a plurality of levels of cache for an application executed by the one of the plurality of cores, and transferring, by the one of the plurality of cores, data associated with the application from an input/output (I/O) device of a computing device directly to the first portion of the one of the plurality of levels of the cache. Other embodiments may be described and claimed.

Abstract: Methods, apparatus, and systems for facilitating effective power management through dynamic reconfiguration of interrupts. Interrupt vectors are mapped to various processor cores in a multi-core processor, and interrupt workloads on the processor cores are monitored. When an interrupt workload for a given processor core is detected to fall below a threshold, the interrupt vectors are dynamically reconfigured by remapping interrupt vectors that are currently mapped to the processor core to at least one other processor core, such that there are no interrupt vectors mapped to the processor core after reconfiguration. The core is then enabled to be put in a deeper idle state. Similar operations can be applied to additional processor cores, effecting a collapsing of interrupt vectors onto fewer processor cores.

Abstract: An embodiment may include network controller circuitry to be comprised in a host computer that includes a host processor to execute an operating system environment. The circuitry may be coupled to the processor, receive at least one packet via a network, store at least one firewall filter parameter set, and execute, based at least in part upon the parameter set and packet, at least one firewall filter action involving, at least in part, the packet. The action may implement, at least in part, at least one firewall rule supplied by a firewall application to an interface of a driver associated with the circuitry. The application may be executed, at least in part, in the environment. The circuitry may generate and store the parameter set based at least in part upon at least one command from the driver. The command may be based at least in part upon the rule.

Abstract: Automatically determining a link speed between link partners using a multispeed fiber module. An embodiment solves the problem of how to determine the highest common link speed between short range (SR)/long range (LR) fiber link partners when at least one of the link partners is using a multispeed fiber module. In an embodiment, a multispeed fiber module comprises a module that is capable of both 10 gigabit (GB) per second Ethernet and 1 GB per second Ethernet or lesser data transfer speeds over a fiber optical link. In an embodiment, the method comprises trying each link speed in a known succession, from highest supported speed to lowest supported speed. In an embodiment, an initiator link partner “blinks” a transmit laser, which alerts the link partners that a link speed determination session is being initiated. By automatically determining link speed, the user is relieved of the necessity to manually configure the link speed.

Abstract: An embodiment may include network controller circuitry to be comprised in a host computer that includes a host processor to execute an operating system environment. The circuitry may be coupled to the processor, receive at least one packet via a network, store at least one firewall filter parameter set, and execute, based at least in part upon the parameter set and packet, at least one firewall filter action involving, at least in part, the packet. The action may implement, at least in part, at least one firewall rule supplied by a firewall application to an interface of a driver associated with the circuitry. The application may be executed, at least in part, in the environment. The circuitry may generate and store the parameter set based at least in part upon at least one command from the driver. The command may be based at least in part upon the rule.