Abstract: An apparatus for decrypting an encrypted bit sequence comprises a test device configured to subject the bit sequence to a statistical test in view of an expected distribution of the bits in the bit sequence in order to obtain a test result. The apparatus is configured to decrypt the bit sequence should the test result indicate that the distribution follows the expected distribution, and to not decrypt the bit sequence should the test result indicate that the distribution does not follow the expected distribution.

Abstract: According to various embodiments, a security device is provided comprising a modular reducer configured to perform a modulo reduction by a modulus of each binary number of a sequence of binary numbers forming a data word, wherein each binary number consists of n bits by one or more first iterations comprising, in reaction to a first detector of the security device detecting that the most significant bit (MSB) of the binary number is set, changing the binary number by deleting its MSB and adding the difference between 2n?1 and the modulus to the binary number, followed by one or more second iterations comprising, in reaction to a second detector of the security device detecting that the MSB of the sum of the binary number with the difference between 2n?1 and the modulus is set, setting the binary number to that sum, wherein the MSB of the sum is deleted.

Abstract: A security device comprise a sampler configured to, in each iteration of a sequence of iterations, sample a string of n bits, a bit string rejector configured to reject the string of n bits in reaction to an AND combiner generating an AND combination of the sampled bits which is equal to 1, in case a given limit or an integer multiple of the given limit is equal to 2n?1, and AND-OR combiner generating an AND combination of the most significant bit of the sampled bits with an OR combination of the other bits of the sampled bits which is equal to 1 in case the given limit is equal to 2n?1+1; and a controller configured stop the sequence of iterations in reaction to a number of strings of n bits which have not been rejected being equal or above a predefined number of bit strings.

Abstract: An apparatus for decrypting an encrypted bit sequence comprises a test device configured to subject the bit sequence to a statistical test in view of an expected distribution of the bits in the bit sequence in order to obtain a test result. The apparatus is configured to decrypt the bit sequence should the test result indicate that the distribution follows the expected distribution, and to not decrypt the bit sequence should the test result indicate that the distribution does not follow the expected distribution.