Abstract: According to various embodiments, a cryptographic processing device is described comprising a processor configured to determine a masking component, generate a masked version of a secret first element by masking multiple components of the secret first element with the masking component, determine a first share of the product of the secret first element and a second element by multiplying the second element with the masked version of the secret first element, determine a second share of the product of the secret first element and the second element by multiplying the second element with the difference of the secret first element and the masked version of the secret first element and continue with a lattice-based cryptography operation using the first share and the second share of the product.

Abstract: An apparatus for decrypting an encrypted bit sequence comprises a test device configured to subject the bit sequence to a statistical test in view of an expected distribution of the bits in the bit sequence in order to obtain a test result. The apparatus is configured to decrypt the bit sequence should the test result indicate that the distribution follows the expected distribution, and to not decrypt the bit sequence should the test result indicate that the distribution does not follow the expected distribution.

Abstract: According to various embodiments, a cryptographic processing device is described comprising a processor configured to determine a masking component, generate a masked version of a secret first element by masking multiple components of the secret first element with the masking component, determine a first share of the product of the secret first element and a second element by multiplying the second element with the masked version of the secret first element, determine a second share of the product of the secret first element and the second element by multiplying the second element with the difference of the secret first element and the masked version of the secret first element and continue with a lattice-based cryptography operation using the first share and the second share of the product.

Abstract: Compiling a compression function of a lattice-based cryptographic mechanism by (i) basing the compression function on a lossy compression function, (ii) determining an error based on a loss introduced by an integer division, and (iii) determining an output of the compression function based on the error.

Abstract: A method and a device for amplifying a reception signal are provided, involving the adjustment of a gain by which the reception signal is amplified, in particular as a function of a signal level of the reception signal. For example, lowpass filtering with a variable cutoff frequency is used to filter out a gain-dependent frequency range of the reception signal, which may especially contain an undesirable echo signal. Such a method and such a device are suitable in particular for the reception of ADSL signals in a central office.

Abstract: An electronic component includes a first circuit portion having a first supply voltage terminal and a second circuit portion having a second supply voltage terminal. The electronic component includes a first external supply voltage line that supplies the first circuit portion, and a second external supply voltage line that supplies the second circuit portion. The second supply voltage terminal is connected to the second external supply voltage line, and to an electrical connection, which does not run via the first external supply voltage line, between the second external supply voltage line and the first supply voltage terminal. The first circuit portion is isolated from the second circuit portion with respect to high-frequency interference, while electrostatic discharge may propagate via the supply voltage system of the electronic component.

Abstract: A device and method are disclosed, whereby the normally complicated and difficult frequency determination is achieved by simply arranged and executed measures, namely by means of larger, smaller and/or equal comparisons and a counting of certain events. The invention further relates to arrangements whereby the noise signal level, or the influence thereof on the verification to be carried out is reduced.

Abstract: An amplifier circuit in particular configured as an operational transconductance amplifier has signal paths switched in parallel to the individual transversal branches or signal paths, which can be alternatively activated and deactivated with the aid of suitable switching means (1, 2), so that without essentially changing the dynamic characteristics of the amplifier circuit switching over is possible by activating these parallel-switched additional signal paths or the transistors (M3.2–M12.2) contained in these from normal operation (A) into an operation (B) with, for example, a higher clock frequency in comparison to normal operation or for operating with higher loads in comparison to normal operation.

Abstract: In the line terminating device, which is provided for transmitting and receiving narrowband low-frequency voice signals and broadband data signals at a higher frequency, the analog reception path is subdivided into two separate analog paths (32, 33) for voice and data using a balance filter (49), which is used for data signal echo cancellation. In the transmission direction, the voice signal path and the data signal path are separated in the digital part by means of digital filters (43, 45). The invention is used for voice and data signal separation in xDSL methods, for example, ADSL.Lite.

Abstract: An electronic component includes a first circuit portion having a first supply voltage terminal and a second circuit portion having a second supply voltage terminal. The electronic component includes a first external supply voltage line that supplies the first circuit portion, and a second external supply voltage line supplies the second circuit portion. The second supply voltage terminal is connected to the second external supply voltage line, and to an electrical connection, which does not run via the first external supply voltage line, between the second external supply voltage line and the first supply voltage terminal. The first circuit portion is isolated from the second circuit portion with respect to high-frequency interference, while electrostatic discharge may propagate via the supply voltage system of the electronic component.

Abstract: The invention relates to a tuning circuit for tuning a filter stage, which has an RC element (1) with an RC time constant (?), with the RC time constant (?) being the product of the resistance of a resistor (R1) in the RC element (1) and the capacitance of a capacitor (C1), which is connected in series with the resistor (R1), in the RC element (1), having a comparator (10) for comparison of the voltage which is produced at the potential node (4) between the resistor (R1) and the capacitor (C1), with a reference ground voltage; and having a controller (15) which varies the charge on the capacitor (C1) in the RC element (1) until the comparator (10) indicates that the voltage which is produced at the potential node (4) is equal to the reference ground voltage, with the controller (15) switching a capacitor array (26) as a function of the charge variation time, which capacitor array (26) is connected in parallel with the capacitor (C1) in the RC element (1), in order to compensate for any discrepancy between the

Abstract: A method and apparatus for creating electrostatic discharge (“ESD”) protection in a microelectronic module is disclosed. A semiconductor circuit comprises at least two independent voltage-supply domains, each of which comprises at least one bonding pad. The at least two bonding pads of the at least two independent voltage-supply domains are coupled together by an electrical connection, such as a bonding wire or a solder spot, which is routed outside the semiconductor circuit.

Abstract: A method and a device for amplifying a reception signal are provided, involving the adjustment of a gain by which the reception signal is amplified, in particular as a function of a signal level of the reception signal. For example, lowpass filtering with a variable cutoff frequency is used to filter out a gain-dependent frequency range of the reception signal, which may especially contain an undesirable echo signal. Such a method and such a device are suitable in particular for the reception of ADSL signals in a central office.

Abstract: An amplifier circuit in particular configured as an operational transconductance amplifier has signal paths switched in parallel to the individual transversal branches or signal paths, which can be alternatively activated and deactivated with the aid of suitable switching means (1, 2), so that without essentially changing the dynamic characteristics of the amplifier circuit switching over is possible by activating these parallel-switched additional signal paths or the transistors (M3.2-M12.2) contained in these from normal operation (A) into an operation (B) with, for example, a higher clock frequency in comparison to normal operation or for operating with higher loads in comparison to normal operation.

Abstract: Programmable echo cancellation filter for echo signal cancellation for a transceiver having a signal input (13) for receiving the transmission signal emitted by the transceiver (1), an input resistor (36) connected to the signal input (13), an operational amplifier (39), whose signal input (38) is connected to the input resistor (36) and whose signal output (41) is connected to an output resistor (43), a first programmable resistor circuit (48), which is provided between the signal output (41) of the operational amplifier (39) and the signal input (38) of the operational amplifier, a second programmable resistor circuit (51), which is provided between the output resistor (43) and a signal output (15) of the echo cancellation filter (14), a third programmable resistor circuit (55) which is provided between the first programmable resistor circuit (48) and the signal output (15) of the echo cancellation filter (14), the programmable resistor circuits (48, 51, 55) each having a plurality of resistors (65) which a

Abstract: The invention relates to a tuning circuit for tuning a filter stage, which has an RC element (1) with an RC time constant (&tgr;), with the RC time constant (&tgr;) being the product of the resistance of a resistor (R1) in the RC element (1) and the capacitance of a capacitor (C1), which is connected in series with the resistor (R1), in the RC element (1), having a comparator (10) for comparison of the voltage which is produced at the potential node (4) between the resistor (R1) and the capacitor (C1), with a reference ground voltage; and having a controller (15) which varies the charge on the capacitor (C1) in the RC element (1) until the comparator (10) indicates that the voltage which is produced at the potential node (4) is equal to the reference ground voltage, with the controller (15) switching a capacitor array (26) as a function of the charge variation time, which capacitor array (26) is connected in parallel with the capacitor (C1) in the RC element (1), in order to compensate for any discrepancy bet

Abstract: A device and method are disclosed, whereby the normally complicated and difficult frequency determination is acheived by simply arranged and executed measures, namely by menas of larger, smaller and/or equal comparisons and a counting of certain events. The invention further relates to arrangements whereby the noise signal level, or the influence thereof on the verification to be carried out is reduced.

Abstract: The invention relates to a circuit configuration for quantization of digital signals and for filtering quantization noise. Said circuit configuration comprises a multitude of digital control loops connected in series and having quantizers. The digital signals having a word length of m-bits are fed to a first control loop in the series. The quantization error signal of each quantizer is filtered and fed back to the corresponding digital control loop. It is then fed to a downstream digital control loop. The quantized output signal of the first digital control loop is adapted to a third word length of u-bits which is smaller than the first word length. Except for the quantized output signal of the first digital control loop, the quantized output signals of the digital control loops of the series are respectively filtered by a digital filter.

Abstract: Programmable echo cancellation filter for echo signal cancellation for a transceiver having a signal input (13) for receiving the transmission signal emitted by the transceiver (1), an input resistor (36) connected to the signal input (13), an operational amplifier (39), whose signal input (38) is connected to the input resistor (36) and whose signal output (41) is connected to an output resistor (43), a first programmable resistor circuit (48), which is provided between the signal output (41) of the operational amplifier (39) and the signal input (38) of the operational amplifier, a second programmable resistor circuit (51), which is provided between the output resistor (43) and a signal output (15) of the echo cancellation filter (14), a third programmable resistor circuit (55), which is provided between the first programmable resistor circuit (48) and the signal output (15) of the echo cancellation filter (14), the programmable resistor circuits (48, 51, 55) each having a plurality of resistors (65) which