Abstract: Described is a cognitive signal processor that can denoise an input signal that contains a mixture of waveforms over a large bandwidth. Delay-embedded mixture signals are generated from a mixture of input signals. The delay-embedded mixture signals are mapped with a reservoir computer to reservoir states of a dynamical reservoir having output layer weights. The output layer weights are adapted based on short-time linear prediction. Finally, a denoised output of the mixture of input signals is generated.

Abstract: Described is a cognitive signal processor for signal denoising and blind source separation. During operation, the cognitive signal processor receives a mixture signal that comprises a plurality of source signals. A denoised reservoir state signal is generated by mapping the mixture signal to a dynamic reservoir to perform signal denoising. At least one separated source signal is identified by adaptively filtering the denoised reservoir state signal.

Abstract: A cellular radio architecture that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a receiver module having a plurality of signal channels for different frequency bands, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture also includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths. The architecture also includes a dual self-cancellation circuit providing digital and analog cancellation of the transmit signal in the receiver module.

Abstract: A method of processing a plurality of time-varying signals received at a sensor communicatively coupled to a signal data processor to identify at least one parameter of at least one of the plurality of time-varying signals is provided. The method includes receiving, at a plurality of blind source separation (BSS) modules of the signal data processor, signals derived from the plurality of time-varying signals, each BSS module of the plurality of BSS modules including a filtering subsystem having a pipelined architecture and a parallelized architecture. The method also includes generating a plurality of blind source separated signals, and transmitting at least one pulse descriptor word (PDW) parameter vector signal to a computing device of the signal data processor. The method further includes identifying the at least one parameter from the at least one PDW parameter vector signal, and outputting the at least one parameter from the signal data processor.

Abstract: A method for removing an extracted RF signal to examine a spectrum of at least one other RF signal includes receiving a mixture signal by an ADC. The mixture signal includes a plurality of separate signals from different signal sources. The mixture signal is digitized by the ADC. A first digitized signal and a second digitized signal are generated that are the same. The first digitized signal is delayed a predetermined time delay and the second digitized signal is processed in a neuromorphic signal processor to extract an extracted signal. The predetermined time delay corresponds to a delay embedding in the neuromorphic signal processor. A phase delay and amplitude of the extracted signal is adjusted based on a phase delay and amplitude of the first digitized signal. An adjusted extracted signal is cancelled from the first digitized signal to provide an input examination signal for examination.

Abstract: A method for generating pulse descriptor words (PDWs) including frequency and/or bandwidth data from time-varying signals received by a sensor includes filtering, at a plurality of blind source separation (BSS) modules, signals derived from the time-varying signals, each BSS module including a filtering subsystem having a plurality of filter modules. Each filter module has a frequency filter coefficient (?) and is parameterized by a center frequency (f). The method also includes transmitting at least one blind source separated signal from the BSS modules to a PDW generation module communicatively coupled to the filtering subsystem. The method further includes generating, using the PDW generation module and based on the blind source separated signal, at least one PDW parameter vector signal containing the frequency data. The method also includes updating, upon generating and based on the PDW parameter vector signal, values of ? and/or f for each filter module.

Abstract: A method of processing a plurality of time-varying signals received at a sensor communicatively coupled to a signal data processor to identify at least one parameter of at least one of the plurality of time-varying signals is provided. The method includes receiving, at a plurality of blind source separation (BSS) modules of the signal data processor, signals derived from the plurality of time-varying signals, each BSS module of the plurality of BSS modules including a filtering subsystem having a pipelined architecture and a parallelized architecture. The method also includes generating a plurality of blind source separated signals, and transmitting at least one pulse descriptor word (PDW) parameter vector signal to a computing device of the signal data processor. The method further includes identifying the at least one parameter from the at least one PDW parameter vector signal, and outputting the at least one parameter from the signal data processor.

Abstract: Described is a cognitive signal processor for signal denoising and blind source separation. During operation, the cognitive signal processor receives a mixture signal that comprises a plurality of source signals. A denoised reservoir state signal is generated by mapping the mixture signal to a dynamic reservoir to perform signal denoising. At least one separated source signal is identified by adaptively filtering the denoised reservoir state signal.

Abstract: A cellular radio architecture that includes a multiplexer coupled to an antenna structure and including multiple signal paths, where each signal path includes a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The delta-sigma modulator includes an LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

Abstract: An asynchronous pulse domain to synchronous digital domain converter for converting pulse domain signals in an input asynchronous pulse domain data stream to synchronous digital domain signals in a data output stream. The converter comprises a plurality of counters arranged in a ring configuration with only one counter in the ring being responsive at any given time to positive and negative going pulses in the input asynchronous pulse domain data stream, each counter, when so responsive, counting a number of time units between either (i) a positive going pulse and an immediately following negative going pulse or (ii) a negative going pulse and an immediately following positive going pulse, the counts of the counters when so responsive being synchronously converted to synchronous digital domain signals in the data output stream. The disclosed asynchronous pulse domain to synchronous digital domain converter can be used with spike domain signals if desired.

Abstract: A liquid state machine pulse domain neural processor circuit comprising an asynchronous input filter circuit provided for, at any given time, receiving a series of analog input signals and generating in response a set of time-encoded values that depend on the series of analog input signals received at said given time and before said given time; and an asynchronous trainable readout map circuit for transforming at least a portion of said set of time encoded values into output signals.

Abstract: A cellular radio architecture for a vehicle that includes a receiver module having a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals. Portions of the receiver and transmitter modules are fabricated with indium phosphide (InP) technologies and portions of the receiver and transmitter modules are fabricated with CMOS technologies.

Abstract: Described is a cognitive blind source separator (CBSS). The CBSS includes a delay embedding module that receives a mixture signal (the mixture signal being a time-series of data points from one or more mixtures of source signals) and time-lags the signal to generate a delay embedded mixture signal. The delay embedded mixture signal is then linearly mapped into a reservoir to create a high-dimensional state-space representation of the mixture signal. The state-space representations are then linearly mapped to one or more output nodes in an output layer to generate pre-filtered signals. The pre-filtered signals are passed through a bank of adaptable finite impulse response (FIR) filters to generate separate source signals that collectively formed the mixture signal.

Abstract: A cellular radio architecture for a vehicle that includes a triplexer coupled to an antenna structure and including three signal paths, where each signal path includes a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the triplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The delta-sigma modulator includes an LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

Abstract: A synaptic time-multiplexed (STM) neuromorphic network includes a neural fabric that includes nodes and switches to define inter-nodal connections between selected nodes of the neural fabric. The STM neuromorphic network further includes a neuromorphic controller to form subsets of a set of the inter-nodal connections representing a fully connected neural network. Each subset is formed during a different time slot of a plurality of time slots of a time multiplexing cycle of the STM neuromorphic network. In combination, the inter-nodal connection subsets implement the fully connected neural network. A method of synaptic time multiplexing a neuromorphic network includes providing the neural fabric and forming the subsets of the set of inter-nodal connections.

Abstract: An RF transmitter module for a cellular radio that includes a delta-sigma modulator having a plurality of interleaving dynamic element matching (DEM) circuits providing interleaved digital bits at a reduced clock rate. An interleaver controller controls the DEM circuits so as to provide groups of the digital bits at different points in time. In one embodiment, a summation junction adds the groups of the digital bits to provide a continuous stream of the interleaved digital bits, a DAC converts the stream of interleaved digital bits to an analog signal, and a power amplifier amplifies the analog signal.

Abstract: A cellular radio architecture for a vehicle that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a triplexer having signal paths that include a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the triplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths in the triplexer.

Abstract: A cellular radio architecture that includes a receiver module having a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals. Portions of the receiver and transmitter modules are fabricated with silicon germanium (SiGe) technologies and portions of the receiver and transmitter modules are fabricated with CMOS technologies.

Abstract: A transceiver front-end circuit for a cellular radio architecture for a vehicle, where the transceiver circuit employs components for reducing power consumption. The transceiver circuit includes a receiver module having a delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, where the delta-sigma modulator includes a combiner, a low noise amplifier (LNA), an LC filter and a quantizer circuit. The LC filter is a multi-order filter and the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter. The order of the LC filter is selectively reduced in situations where a full dynamic range of the cellular radio is not required and a bit resolution of the quantizer circuit is reduced so as to reduce the power requirements of the cellular radio.

Abstract: A method for reducing power consumption in a transceiver front-end circuit for a cellular radio. The transceiver circuit includes a receiver module having a delta-sigma modulator that converts analog receive signals to a representative digital signal in an interleaving process, where the delta-sigma modulator includes a combiner, a low noise amplifier (LNA), an LC filter and a quantizer circuit. The LC filter is a multi-order filter and the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter. The method includes selectively reducing the order of the LC filter in situations where a full dynamic range of the cellular radio is not required and reducing a bit resolution of the quantizer circuit so as to reduce the power requirements of the cellular radio.