Patents by Inventor Peter Pochmüller

Peter Pochmüller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Test system and test structure for testing an integrated circuit and an integrated circuit having a test structure
    Patent number: 7193426
    Abstract: One embodiment of the invention relates to a test structure for testing an integrated circuit with a tester unit that has one or more connecting lines to connect the integrated circuit, wherein a test signal and/or a supply voltage is applied to the integrated circuit for the purposes of testing, and an interference unit connected to at least one of the connecting lines which applies an interference signal to the connecting line to reduce the quality of the test signal and/or the quality of the supply voltage.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: March 20, 2007
    Assignee: Infineon Technologies AG
    Inventor: Peter Pochmüller
  • Field-effect-controlled transistor and method for fabricating the transistor
    Patent number: 6515319
    Abstract: An active surface with a source area, a channel area and a drain area is provided in a semiconductor substrate. Each of the areas lie adjacent to a main surface of the semiconductor substrate. At least one trench is provided in the main surface of the semiconductor substrate. The trench is adjacent to the channel area and is situated in the gate electrode part. The gate electrode preferably has two opposite parts which are each adjacent to the channel area. The transistor is produced using standard process steps.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: February 4, 2003
    Assignee: Infineon Technologies AG
    Inventors: Dietrich Widmann, Armin Wieder, Justus Kuhn, Jens Lüpke, Jochen Müller, Peter Pochmüller, Michael Schittenhelm