Abstract: A circuit configuration for synchronizing pulse-shaped signals includes a clock-controlled flip-flop having a data input for receiving a pulse-shaped signal to be synchronized, a data output for supplying a synchronized signal, and a clock input. A test circuit has an input connected to the data input of the clock-controlled flip-flop for receiving the pulse-shaped signal to be synchronized, another input for receiving at least one clock signal, and an output connected to the clock input of the clock-controlled flip-flop. The test circuit generates an output signal at the output of the test circuit to be supplied to the clock input of the clock-controlled flip-flop being either equal to or phase-offset relative to the at least one clock signal supplied to the other input of the test circuit. The test circuit ascertains a phase difference between an edge of the pulse-shaped signal to be weighted and a weighting edge of the output signal of the test circuit.