Abstract: In a pay television system, a program signal is transmitted scrambled to prevent its unauthorized reception, the scrambled signal being accompanied by authorization codes, one for each authorized subscriber, a subscription key and a pay-per-view key. At a receiver, if the appropriate authorization code is received, the receiver functions in the subscription mode in which mode the subscription key provides for the descrambling of the program signal. If the appropriate authorization code is not received, indicating that the subscriber is not pre-authorized to receive the program in an intelligible manner, the receiver is set to function in a pay-per-view mode in which mode, on request, the pay-per-view key provides for the descrambling of the program signal. If there is a delay receiving the appropriate authorization code, the receiver can be set into the pay-per-view mode for at least the period of the delay, so that the scrambled signal is immediately rendered intelligible.

Abstract: An interface arrangement between a television receiver (1) and a conditional access sub-system (3), in particular for MAC type television signals comprises a bus having a first line (CKFH) conveying clock signals at television line frequency, a second line (DATA) conveying data during prescribed periods in a four television frame period bus cycle and a third line (DIRN) conveying a signal indicating the direction of data travel on the second line. The bus may be connected to a number of sub-systems (3(1), 3(2)) internal to the television receiver or may be connected via a connector unit (7) to external sub-systems (5(1), 5( 2)).

Abstract: A pseudo-random binary sequence generator comprises at least one shift register (S, T) arranged in a recirculating loop and having a plurality of logic gates (G) for logically combining the outputs of selected stages of the register to provide a pseudo-random sequence, and a multiplexer (M), having a p data inputs and q address inputs all connected to selected shift register stages, and which selects at any instant one of the p data input bits in accordance with the q-bit address word to provide the generator output. The number s of logic gates is especially high and is related to the total number r of shift register stages (r>p+q) by the expression: 2.sup.s .gtoreq.r.sup.2. Some of the shift register stages of the or each shift register are connected to selected data inputs of the multiplexer and others of the stages of the same shift register are connected to selected address inputs of the multiplexer.

Abstract: A receiver for recovering sound/data information for a number of services transmitted digitally as a packet multiplex has the data, after demodulation, applied to a first unit (3) where it is resynchronized for application to a sync and data extraction unit (19). In the extraction unit (19) the data packets are processed and applied, at a different clock rate, to a packet bus (25) to which a desired number of packet digital sound recovery devices (26) and packet encryption recovery devices (27) are connected. Instead of each recovery device (26, 27) interrogating all the packets of data those packets carrying a service identification address are processed in the extraction unit (19) and service addresses for user selected services are applied from a microcomputer (23) over an I.sup.2 C bus to the recovery devices (26, 27), control information also being received and interpreted by said extraction unit (19) and applied in similar manner to the recovery devices (26, 27).

Abstract: A wide-band frequency modulated DBS signal of the type having time sequential compressed chrominance and luminance (video) components is received by an aerial (1), frequency converted in a down converter (2) and applied to the input (4) of a conversion unit. The conversion unit has a tuner (5), i.f. stage (9,10) and a frequency demodulator (11) to produce baseband video which is applied after de-emphasis at (12) to a modulator (27) where the video is amplitude modulate onto a vision carrier from an oscillator (28). The modulated carrier is applied through a vestigial sideband filter (29) and an adder (30) to an output (31). Sound/data bursts present in the DBS signal are recovered in a stage (13) and processed in a processor (14) where the sound/data bursts are expanded to occupy approximately a line period at a bit rate which is an integral sub-multiple of the bit rate for the sound/data bursts in the received DBS signal.