Abstract: A lead frame for a high power semiconductor device die has three external lead conductors, the outer two of which are reentrantly bent outwardly from the center of the lead frame. When the lead frame is overmolded, the outer conductors are spaced from a central conductor by an increased creepage distance along the plastic surface of the housing. Further, the lead sequence of the exterior leads is gate, source, drain for a power MOSFET. The post area for wire bonding to the source post is enlarged to permit wire bonding with at least three bond wires. The external conductors can be downwardly bent to form a surface mount device. The cross-sectional area of the external conductors is substantially enlarged, although only a small enlargement of the circuit board hole is needed. The package outline has a long flat area centered over the main die area, with a tapered end surface which allows the package to pry open a mounting spring for surface mounting of the package.

Abstract: A contact clip for the aluminum contact of a semiconductor device has a central nickel-iron body, preferably Nilo alloy 42, which is coated on top and bottom by a soft, but high conductivity metal such as gold, silver or copper. The nickel-iron body has a thickness of about 15 mils, and is about the thickness of the silicon die. The conductive layers have a thickness of about 5% to 20% of that of the nickel-iron core.

Abstract: A lead frame for a high power semiconductor device die has three external lead conductors, the outer two of which are reentrantly bent outwardly from the center of the lead frame. When the lead frame is overmolded, the outer conductors are spaced from a central conductor by an increased creepage distance along the plastic surface of the housing. Further, the lead sequence of the exterior leads is gate, source, drain for a power MOSFET. The post area for wire bonding to the source post is enlarged to permit wire bonding with at least three bond wires. The external conductors can be downwardly bent to form a surface mount device. The cross-sectional area of the external conductors is substantially enlarged, although only a small enlargement of the circuit board hole is needed. The package outline has a long flat area centered over the main die area, with a tapered end surface which allows the package to pry open a mounting spring for surface mounting of the package.

Abstract: A lead frame for a high power semiconductor device die has three external lead conductors, the outer two of which are reentrantly bent outwardly from the center of the lead frame. When the lead frame is overmolded, the outer conductors are spaced from a central conductor by an increased creepage distance along the plastic surface of the housing. Further, the lead sequence of the exterior leads is gate, source, drain for a power MOSFET. The post area for wire bonding to the source post is enlarged to permit wire bonding with at least three bond wires. The external conductors can be downwardly bent to form a surface mount device. The cross-sectional area of the external conductors is substantially enlarged, although only a small enlargement of the circuit board hole is needed. The package outline has a long flat area centered over the main die area, with a tapered end surface which allows the package to pry open a mounting spring for surface mounting of the package.

Abstract: A semiconductor device package has a lead frame with four or more die receiving pads. The first pad is large enough to receive two or more of the die, laterally spaced from one another, while the other pads receive at least one die each. The die may be arranged in a single straight path, or in spaced parallel paths. The tops of selected ones of the die are bonded to lead frame elements of adjacent pads to complete bridge type circuits within the package. The die and pads are enclosed by a molded plastic housing and short sections of the pads protrude through the housing wall.

Abstract: A process for forming a true chip scale package comprising the sandwiching of a silicon wafer with a large number of identical die therein between top and bottom metal contact plates of the same size as the wafer. The sandwich is secured together as by soldering, and the die and contact plates are singulated in the form of a final chip scale package. The edge of each chip may have an insulation band formed thereon. Slots may be formed in the top contact to define, with the edge saw cuts, a separate contact area on each top contact.

Abstract: A very high power semiconductor device package has a heavy flat conductive terminal which carries a semiconductor die. A thin conductive tab is disposed to be continuous with but insulated from the terminal and lies in a plane above the heavy flat terminal. A top electrode of the die is connected to the tab and an insulation housing encloses portions of the adjacent ends of the tab and terminal as well as the die and its connector leads. The free end of the tab may have printed circuit connection fingers. Two notches are cut into the sides of the thin tab at a location closely spaced from the surface of the housing through which the tab extends to provide stress relief for the insulation housing through which the tab extends.

Abstract: A non-ceramic solder composition for coupling a semiconductor device to a conductive support, composed of a first amount of a solder component and a second amount of a filler component. The first and second amounts of the respective components are proportioned so that the solder composition has an overall coefficient of thermal expansion that is intermediate of the coefficients of thermal expansion of the semiconductor device and the conductive support.

Abstract: A lead frame for a high power semiconductor device die has three external lead conductors, the outer two of which are reentrantly bent outwardly from the center of the lead frame. When the lead frame is overmolded, the outer conductors are spaced from a central conductor by an increased creepage distance along the plastic surface of the housing. Further, the lead sequence of the exterior leads is gate, source, drain for a power MOSFET. The post area for wire bonding to the source post is enlarged to permit wire bonding with at least three bond wires. The external conductors can be downwardly bent to form a surface mount device. The cross-sectional area of the external conductors is substantially enlarged, although only a small enlargement of the circuit board hole is needed. The package outline has a long flat area centered over the main die area, with a tapered end surface which allows the package to pry open a mounting spring for surface mounting of the package.

Abstract: A semiconductor device package has a lead frame with four or more die receiving pads. The first pad is large enough to receive two or more of the die, laterally spaced from one another, while the other pads receive at least one die each. The die may be arranged in a single straight path, or in spaced parallel paths. The tops of selected ones of the die are bonded to lead frame elements of adjacent pads to complete bridge type circuits within the package. The die and pads are enclosed by a molded plastic housing and short sections of the pads protrude through the housing wall.

Abstract: A process for forming a true chip scale package comprising the sandwiching of a silicon wafer with a large number of identical die therein between top and bottom metal contact plates of the same size as the wafer. The sandwich is secured together as by soldering, and the die and contact plates are singulated in the form of a final chip scale package. The edge of each chip may have an insulation band formed thereon. Slots may be formed in the top contact to define, with the edge saw cuts, a separate contact area on each top contact.

Abstract: A contact clip for the aluminum contact of a semiconductor device has a central nickel-iron body, preferably Nilo alloy 42, which is coated on top and bottom by a soft, but high conductivity metal such as gold, silver or copper. The nickel-iron body has a thickness of about 15 mils, and is about the thickness of the silicon die. The conductive layers have a thickness of about 5% to 20% of that of the nickel-iron core.

Abstract: A process for forming a true chip scale package comprising the sandwiching of a silicon wafer with a large number of identical die therein between top and bottom metal contact plates of the same size as the wafer. The sandwich is secured together as by soldering, and the die and contact plates are singulated in the form of a final chip scale package. The edge of each chip may have an insulation band formed thereon. Slots may be formed in the top contact to define, with the edge saw cuts, a separate contact area on each top contact.

Abstract: A semiconductor device package is provided which can accommodate currents larger than those of similarly sized standard device packages such as the “TO-247” package. Higher currents are accommodated by allowing a larger semiconductor die to be mounted on the device's lead frame than can be mounted on a similarly sized standard package. An improved mold clamping area is also provided which reduces the area from which damaging moisture can enter the molded package and increases the distance required for moisture to contact the die. Clip arrangements are also provided to mount the device package to a circuit board or heat sink, thereby allowing the increased operating temperatures associated with the increased operating currents to be efficiently dissipated.

Abstract: A surface mount semiconductor package includes washing grooves disposed on a bottom surface of a plastic housing. The package also employs locking elements for locking the plastic housing to a metal pad on which a semiconductor device is mounted, where the locking elements include a cross bar between terminals, slots disposed on the metal pad which include barbs and dove-tail grooves disposed on the metal pad. The metal pad includes a waffled surface for improved coupling to a substrate. The package includes terminals having offset portions for providing spaces for the plastic housing material to fill for improved encapsulation of the terminals. The metal pad extends beyond the lateral edges of the plastic housing for improved heat dissipation and for providing a surface to couple to a heatsink.

Abstract: A surface mount semiconductor package employs locking elements for locking a plastic housing to a metal pad on which a semiconductor device is mounted. The package includes terminals having elongated crushable beads on their side surfaces adjacent the portions of the terminals just outside the plastic housing. The beads are crushed inwardly by a molding tool when it closes to provide a seal which prevents the molding plastic from bleeding out and over the sides of the terminals which extend beyond the housing and which could interfere with solder connection to the terminals.

Abstract: A semiconductor package includes a base plate, a semiconductor die having top and bottom surfaces, the bottom surface being mounted to the base plate, and a conductor tab having first and second ends, the first end being adapted to communicate with and couple to external circuitry, the second end including a relatively wide foot having a plurality of finger portions separated by gaps, the finger portions being mounted to an covering a substantial portion of the top surface of the semiconductor die.

Abstract: A surface mount semiconductor package includes washing grooves disposed on a bottom surface of a plastic housing. The package also employs locking elements for locking the plastic housing to a metal pad on which a semiconductor device is mounted, where the locking elements include a cross bar between terminals, slots disposed on the metal pad which include barbs and dove-tail grooves disposed on the metal pad. The metal pad includes a waffled surface for improved coupling to a substrate. The package includes terminals having offset portions for providing spaces for the plastic housing material to fill for improved encapsulation of the terminals. The metal pad extends beyond the lateral edges of the plastic housing for improved heat dissipation and for providing a surface to couple to a heatsink.

Abstract: A surface mount semiconductor package includes a semiconductor device, a metal pad on which the semiconductor device is mounted, and a housing formed of a flowable material which bonds to the metal pad and encapsulates the semiconductor device when cured, where the metal pad includes a waffled surface opposite the surface on which the semiconductor device is mounted for accepting solder between the metal pad and a substrate and for permitting solder wetting therebetween.

Abstract: A surface mount semiconductor package employs locking elements for locking a plastic housing to a metal pad on which a semiconductor device is mounted. The package includes terminals having elongated crushable beads on their side surfaces adjacent the portions of the terminals just outside the plastic housing. The beads are crushed inwardly by a molding tool when it closes to provide a seal which prevents the molding plastic from bleeding out and over the sides of the terminals which extend beyond the housing and which could interfere with solder connection to the terminals.