Patents by Inventor Peter R. Tomaszewski

Peter R. Tomaszewski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5577078
    Abstract: An edge detector has a digital phase locking loop in which one of the signals (e.g., the data signal) is coupled to a delay chain that develops a series of incrementally phase delayed versions of the input. Adjacent phase delayed pairs are selected, one pair at a time, and are compared to the other signal (e.g., the clock signal) to determine if an edge of the clock falls between the edges of the data signal in the selected phase pair, or falls outside the edges of the selected phase pair, on one side or the other thereof. If the clock edge falls outside the selected pair, a control signal selects another pair for comparison and the process is repeated until, for example, the data edges are aligned with the positive going edge of the clock. With a clock frequency equal to twice data frequency, the data can then be sampled on the falling edge of the clock.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: November 19, 1996
    Assignee: International Business Machines Corporation
    Inventors: Richard C. Jordan, Robert S. Capowski, Daniel F. Casper, Frank D. Ferraiolo, William C. Laviola, Peter R. Tomaszewski
  • Patent number: 5487095
    Abstract: An edge detector has a digital phase locking loop in which one of the signals (e.g., the data signal) is coupled to a delay chain that develops a series of incrementally phase delayed versions of the input. Adjacent phase delayed pairs are selected, one pair at a time, and are compared to the other signal (e.g., the clock signal) to determine if an edge of the clock falls between the edges of the data signal in the selected phase pair, or falls outside the edges of the selected phase pair, on one side or the other thereof. If the clock edge falls outside the selected pair, a control signal selects another pair for comparison and the process is repeated until, for example, the data edges are aligned with the positive going edge of the clock. With a clock frequency equal to twice data frequency, the data can then be sampled on the falling edge of the clock.
    Type: Grant
    Filed: June 17, 1994
    Date of Patent: January 23, 1996
    Assignee: International Business Machines Corporation
    Inventors: Richard C. Jordan, Robert S. Capowski, Daniel F. Casper, Frank D. Ferraiolo, William C. Laviola, Peter R. Tomaszewski
  • Patent number: 5239289
    Abstract: A compact, wide range inductor capable of being trimmed to a desired frequency value, comprising at least two individually tunable inductive elements of different resolution, disposed upon an insulative support. The inductor is usually placed within a hybrid circuit and trimmed after component population.
    Type: Grant
    Filed: September 4, 1991
    Date of Patent: August 24, 1993
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Ferraiolo, David P. Pagnani, Peter R. Tomaszewski