Patents by Inventor Peter Runtemund

Peter Runtemund has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit for background light suppression
    Patent number: 11977163
    Abstract: Described is a circuit for background light suppression (SBI, 500) for a light propagation time sensor (22) which operates according to a phase measuring principle and the light propagation time pixels of which have integration nodes or diodes (Ga, Gb, diode_a, diode_b) for the accumulation of charges, having an input stage (50), an operational amplifier (OP) and an SBI current source (SQ), wherein the input phase (50) has bypass and common mode circuits (SBP, SVcm) via which signals of the integration nodes (Ga, Gb, diode_a, diode_b) are guided to the operational amplifier (OP) and via which the operational amplifier (OP) can be switched to a maximum detection or common mode operation, wherein the operational amplifier (OP) is designed such that based on the signals of the integration nodes (Ga, Gb, diode_a, diode_b) switched by the input stage (50) to the operational amplifier (OP), a gate voltage (gate_cs) is generated for the SBI current source (SQ), wherein the SBI current source (SQ) has a first current
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: May 7, 2024
    Assignees: IFM Electronic GmbH, PMDTechnologies AG
    Inventors: Peter Runtemund, Carl Philip Heising
  • Circuit For Background Light Suppression
    Publication number: 20230393279
    Abstract: Described is a circuit for background light suppression (SBI, 500) for a light propagation time sensor (22) which operates according to a phase measuring principle and the light propagation time pixels of which have integration nodes or diodes (Ga, Gb, diode_a, diode_b) for the accumulation of charges, having an input stage (50), an operational amplifier (OP) and an SBI current source (SQ), wherein the input phase (50) has bypass and common mode circuits (SBP, SVcm) via which signals of the integration nodes (Ga, Gb, diode_a, diode_b) am guided to the operational amplifier (OP) and via which the operational amplifier (OP) can be switched to a maximum detection or common mode operation, wherein the operational amplifier (OP) is designed such that based on the signals of the integration nodes (Ga, Gb, diode_a, diode_b) switched by the input stage (50) to the operational amplifier (OP), a gate voltage (gate_cs) is generated for the SBI current source (SQ), wherein the SBI current source (SQ) has a first current
    Type: Application
    Filed: December 9, 2021
    Publication date: December 7, 2023
    Applicants: IFM Electronic GmbH, PMDTechnologies AG
    Inventors: Peter Runtemund, Carl Philip Heising