Patents by Inventor Peter S. Nam

Peter S. Nam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor having passivated sidewalls
    Publication number: 20080251891
    Abstract: The layers of a semiconductor device have exposed edges. The layers that are susceptible to oxidation are protected from oxidation by coating them with a nitride passivation layer. The nitride passivation layer can be applied using plasma enhanced chemical vapor deposition (PECVD). A method of making a passivated sidewall semiconductor includes the steps of applying a nitride or other protective material over a wafer using PECVD or other appropriate deposition method.
    Type: Application
    Filed: April 10, 2007
    Publication date: October 16, 2008
    Inventors: Yeong-Chang Chou, Peter S. Nam, Chun H. Lin, Augusto Gutierrez, Jeffrey Ming-Jer Yang, Michael Wojtowicz
  • Method for etching mesa isolation in antimony-based compound semiconductor structures
    Patent number: 7135411
    Abstract: Antimony-based semiconductor devices are formed over a substrate structure (10) that includes an antimony-based buffer layer (24) and an antimony-based buffer cap (26). Multiple epitaxial layers (30–42) formed over the substrate structure (10) are dry etched to form device mesas (12) and the buffer cap (26) provides a desirably smooth mesa floor and electrical isolation around the mesas.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: November 14, 2006
    Assignee: Northrop Grumman Corporation
    Inventors: Peter S. Nam, Michael D. Lange, Roger S. Tsai