Patents by Inventor Peter S. Ying

Peter S. Ying has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit capacitor and method
    Patent number: 6432791
    Abstract: Capacitors for integrated circuits with a common polysilicon layer for both MOS gates (274, 276, 278) and capacitor (270) lower plates but with implanted doping for the gates and masked diffusive doping for the capacitor plates.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: August 13, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Louis N. Hutter, Peter S. Ying, Imran Khan
  • Method of forming a planarized insulation layer
    Patent number: 5384288
    Abstract: A method for forming a planar insulating layer over the surface of a semiconductor workpiece 8 which includes at least one low region 13 is discussed herein. The first step is to form a layer of blocking material 14 on the surface of the workpiece 8. A first material region 20 is then formed in the low region 13 and an insulating layer 21 is formed over the surface of the workpiece 8 including the first material region 20. The workpiece 8 is then heated in the presence of an active ambient such that the insulation layer 21 reflows and also so that the first material 20 region reacts with the active ambient to create an internal stress in said insulation layer 21. Other systems and methods are also disclosed.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: January 24, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Peter S. Ying
  • Method of forming a planarized insulation layer
    Patent number: 5285102
    Abstract: A method for forming a planar insulating layer over the surface of a semiconductor workpiece 8 which includes at least one low region 13 is discussed herein. The first step is to form a layer of blocking material 14 on the surface of the workpiece 8. A first material region 20 is then formed in the low region 13 and an insulating layer 21 is formed over the surface of the workpiece 8 including the first material region 20. The workpiece 8 is then heated in the presence of an active ambient such that the insulation layer 21 reflows and also so that the first material 20 region reacts with the active ambient to create an internal stress in said insulation layer 21. Other systems and methods are also disclosed.
    Type: Grant
    Filed: December 8, 1992
    Date of Patent: February 8, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Peter S. Ying