Patents by Inventor Peter Schreilechner

Peter Schreilechner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4742315
    Abstract: An integrated NMOS circuit includes an external connection terminal to be connected to an external component, a control voltage terminal, a supply voltage terminal, a reference voltage terminal, a circuit output terminal, a voltage controlled transistor network having an input connected to the control voltage terminal and an output connected to the external connection terminal, a control device supplied by a voltage source through the supply voltage terminal and the reference voltage terminal, the control device having an input connected to the voltage controlled transistor network and an output fed back to the transistor network and connected to the circuit output terminal, the transistor network including a switchable charging current source and a switchable controlled discharging current source, the switchable controlled discharging current source being controlled by a control voltage connected to the control voltage terminal, the switchable charging current source and the switchable controlled discharging
    Type: Grant
    Filed: April 28, 1987
    Date of Patent: May 3, 1988
    Assignee: Siemens Aktiengesellschaft
    Inventor: Peter Schreilechner