Patents by Inventor Peter Shing Fai Lam

Peter Shing Fai Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Modification to reconfigurable functional unit in a reconfigurable chip to perform linear feedback shift register function
    Patent number: 6999984
    Abstract: A reconfigurable chip using reconfigurable functional units is modified to better implement linear feedback shift registers. The reconfigurable functional unit has its input multiplexer unit modified so that it can select a combined value. The combined values include some of the bits from the output of the reconfigurable functional unit as well as carry bit from another reconfigurable functional unit. This can significantly reduce the space required to implement linear feedback shift registers which are useful in many digital communication systems.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: February 14, 2006
    Assignee: Intel Corporation
    Inventor: Peter Shing Fai Lam
  • Data transfer on reconfigurable chip
    Patent number: 6657457
    Abstract: A reconfigurable chip having reconfigurable elements uses an interconnection system which reduces the maximum signal rise and fall time. In one embodiment, the maximum rise and fall time is reduced by providing bypass paths. In another embodiment, buffers are used to reduce signal rise and fall times. Connections between each of the elements are provided by either providing a loop path or by providing bidirectional arrangements of the buffers.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: December 2, 2003
    Assignee: Intel Corporation
    Inventors: Shaila Hanrahan, Peter Shing Fai Lam
  • Configuration bits layout
    Patent number: 6519674
    Abstract: A configuration bit layout for a reconfigurable chip includes address bits stored along with configuration bits. The blocks of data are loaded onto the reconfigurable chip from an external memory and the address information is decoded to load the configuration bits onto the correct locations in the reconfigurable chip. In this way, configuration data need not be stored sequentially in the external memory. Configurations can be allocated into different slices of the reconfigurable chip as well.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: February 11, 2003
    Assignee: Chameleon Systems, Inc.
    Inventors: Peter Shing Fai Lam, Dani Dakhil, Jin-sheng Shyr
  • Modification to reconfigurable functional unit in a reconfigurable chip to perform linear feedback shift register function
    Publication number: 20020165886
    Abstract: A reconfigurable chip using reconfigurable functional units is modified to better implement linear feedback shift registers. The reconfigurable functional unit has its input multiplexer unit modified so that it can select a combined value. The combined values include some of the bits from the output of the reconfigurable functional unit as well as carry bit from another reconfigurable functional unit. This can significantly reduce the space required to implement linear feedback shift registers which are useful in many digital communication systems.
    Type: Application
    Filed: November 21, 2001
    Publication date: November 7, 2002
    Inventor: Peter Shing Fai Lam