Abstract: A CAN communication module (10) comprising a protocol kernel (14) and a CAN logic block (12) is provided. The protocol kernel includes a CAN bus interface and the CAN logic block includes a module interface for connection to an external peripheral bus (22), a message RAM (28) and a CAN message handler (26). The protocol kernel (14) and the CAN logic block (12) have separate clock inputs (32,36).

Abstract: A CAN communication module (10) comprising a protocol kernel (14) and a CAN logic block (12) is provided. The protocol kernel includes a CAN bus interface and the CAN logic block includes a module interface for connection to an external peripheral bus (22), a message RAM (28) and a CAN message handler (26). The protocol kernel (14) and the CAN logic block (12) have separate clock inputs (32,36).

Abstract: A CAN communication module (10) comprises a message RAM (16), a status and control register set (18, 20), a CAN bus interface, a module interface for communication with a central processing unit (CPU) in a connected device and a CAN message handler (14). The module interface includes a dedicated module interface handler (12) with a write transfer register set (24), a read transfer register set (26) and a state machine (34). The write and read transfer register sets are connected to a peripheral bus (28) for communication with the central processor unit of the connected device and with an internal bus (30) for communication with the message RAM and with the status and control register set. The state machine is connected to the CAN message handler to selectively disable the CAN message handler when a write or read access is requested by the central processor unit of the connected device.