Patents by Inventor Peter Stemplinger

Peter Stemplinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Drain-to-source monitoring of power switches in a half-bridge during runtime
    Patent number: 11716028
    Abstract: A driver circuit controls a half-bridge that includes a high-side power switch and a low-side power switch. The driver circuit may comprise a high-side compare unit configured to determine a first drain-to-source voltage, wherein the first drain-to-source voltage is associated with the high-side power switch when the high-side power switch is ON, and a low-side compare unit configured to determine a second drain-to-source voltage, wherein the second drain-to-source voltage is associated with the low-side power switch when the low-side power switch is ON. The high-side compare unit may be further configured to determine a third drain-to-source voltage, wherein the third drain-to-source voltage is associated with the high-side power switch when the high-side power switch is OFF, and the low-side compare unit may be further configured to determine a fourth drain-to-source voltage, wherein the fourth drain-to-source voltage is associated with the low-side power switch when the low-side power switch is OFF.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: August 1, 2023
    Assignee: Infineon Technologies AG
    Inventors: Markus Zannoth, Cristian Murtaza, Peter Stemplinger
  • DRAIN-TO-SOURCE MONITORING OF POWER SWITCHES IN A HALF-BRIDGE DURING RUNTIME
    Publication number: 20230087438
    Abstract: A driver circuit controls a half-bridge that includes a high-side power switch and a low-side power switch. The driver circuit may comprise a high-side compare unit configured to determine a first drain-to-source voltage, wherein the first drain-to-source voltage is associated with the high-side power switch when the high-side power switch is ON, and a low-side compare unit configured to determine a second drain-to-source voltage, wherein the second drain-to-source voltage is associated with the low-side power switch when the low-side power switch is ON. The high-side compare unit may be further configured to determine a third drain-to-source voltage, wherein the third drain-to-source voltage is associated with the high-side power switch when the high-side power switch is OFF, and the low-side compare unit may be further configured to determine a fourth drain-to-source voltage, wherein the fourth drain-to-source voltage is associated with the low-side power switch when the low-side power switch is OFF.
    Type: Application
    Filed: September 20, 2021
    Publication date: March 23, 2023
    Inventors: Markus Zannoth, Cristian Murtaza, Peter Stemplinger
  • Gate-to-source monitoring of power switches during runtime
    Patent number: 11545969
    Abstract: A driver circuit may be configured to control a power switch. The driver circuit may comprise an output pin configured to deliver signals to a gate of the power switch to control an ON/OFF state of the power switch, and a comparator configured to compare a gate-to-source voltage of the power switch to a first threshold when the power switch is ON and to compare the gate-to-source voltage of the power switch to a second threshold when the power switch is OFF.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: January 3, 2023
    Assignee: Infineon Technologies AG
    Inventors: Cristian Murtaza, Markus Zannoth, Peter Stemplinger