Patents by Inventor Peter Tolchinksy

Peter Tolchinksy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High mobility tri-gate devices and methods of fabrication
    Patent number: 8084818
    Abstract: A high mobility semiconductor assembly. In one exemplary aspect, the high mobility semiconductor assembly includes a first substrate having a first reference orientation located at a <110> crystal plane location on the first substrate and a second substrate formed on top of the first substrate. The second substrate has a second reference orientation located at a <100> crystal plane location on the second substrate, wherein the first reference orientation is aligned with the second reference orientation. In another exemplary aspect, the second substrate has a second reference orientation located at a <110> crystal plane location on the second substrate, wherein the second substrate is formed over the first substrate with the second reference orientation being offset to the first reference orientation by about 45 degrees.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: December 27, 2011
    Assignee: Intel Corporation
    Inventors: Mohamad A. Shaheen, Brian Doyle, Suman Dutta, Robert S. Chau, Peter Tolchinksy
  • High mobility tri-gate devices and methods of fabrication
    Publication number: 20100065888
    Abstract: A high mobility semiconductor assembly. In one exemplary aspect, the high mobility semiconductor assembly includes a first substrate having a first reference orientation located at a <110> crystal plane location on the first substrate and a second substrate formed on top of the first substrate. The second substrate has a second reference orientation located at a <100> crystal plane location on the second substrate, wherein the first reference orientation is aligned with the second reference orientation. In another exemplary aspect, the second substrate has a second reference orientation located at a <110> crystal plane location on the second substrate, wherein the second substrate is formed over the first substrate with the second reference orientation being offset to the first reference orientation by about 45 degrees.
    Type: Application
    Filed: January 12, 2006
    Publication date: March 18, 2010
    Inventors: Mohamad A. Shaheen, Brian Doyle, Suman Datta, Robert S. Chau, Peter Tolchinksy
  • High mobility tri-gate devices and methods of fabrication
    Publication number: 20060001109
    Abstract: A high mobility semiconductor assembly. In one exemplary aspect, the high mobility semiconductor assembly includes a first substrate having a first reference orientation located at a <110> crystal plane location on the first substrate and a second substrate formed on top of the first substrate. The second substrate has a second reference orientation located at a <100> crystal plane location on the second substrate, wherein the first reference orientation is aligned with the second reference orientation. In another exemplary aspect, the second substrate has a second reference orientation located at a <110> crystal plane location on the second substrate, wherein the second substrate is formed over the first substrate with the second reference orientation being offset to the first reference orientation by about 45 degrees.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Mohamad Shaheen, Brian Doyle, Suman Datta, Robert Chau, Peter Tolchinksy