Abstract: A temperature protected power semiconductor device has a substrate which includes a power field effect transistor (FET) and a thermosensitive element. The power FET has a gate electrode connected to a gate, a drift region, and first and second terminals for a load current. The load current is controllable during operation by a voltage applied between the gate and the first terminal. The thermosensitive element has a first contact connected to one of the gate electrode and first terminal of the power FET, and a second contact connected to the other one of the gate electrode and first terminal. The thermosensitive element is located close to the power FET and thermally coupled thereto. The thermosensitive element is configured to cause the power FET to reduce the load current in case of an exceedance of a limit temperature of the power FET, by interconnecting the gate and first terminal.

Abstract: An embodiment of an IGBT comprises an emitter terminal at a first surface of a semiconductor body. The IGBT further comprises a collector terminal at a second surface of the semiconductor body. A first zone of a first conductivity type is in the semiconductor body between the first and second surfaces. A collector injection structure adjoins the second surface, the collector injection structure being of a second conductivity type and comprising a first part and a second part at a first lateral distance from each other. The IGBT further comprises a negative temperature coefficient thermistor adjoining the first zone in an area between the first and second parts.

Abstract: A transistor device includes an individual transistor cell arranged in a transistor cell field on a semiconductor body, the individual transistor cell having a gate electrode. The transistor device further includes a gate contact, electrically coupled to the gate electrode and configured to switch on the individual transistor cell by providing a gate current in a first direction and configured to switch off the individual transistor cell by providing a gate current in a second direction, the second direction being opposite to the first direction. The transistor device also includes a gate-resistor structure monolithically integrated in the transistor device. The gate-resistor structure provides a first resistance for the gate current when the gate current flows in the first direction, and provides a second resistance for the gate current, which is different from the first resistance, when the gate current flows in the second direction.

Abstract: A temperature protected power semiconductor device has a substrate which includes a power field effect transistor (FET) and a thermosensitive element. The power FET has a gate electrode connected to a gate, a drift region, and first and second terminals for a load current. The load current is controllable during operation by a voltage applied between the gate and the first terminal. The thermosensitive element has a first contact connected to one of the gate electrode and first terminal of the power FET, and a second contact connected to the other one of the gate electrode and first terminal. The thermosensitive element is located close to the power FET and thermally coupled thereto. The thermosensitive element is configured to cause the power FET to reduce the load current in case of an exceedance of a limit temperature of the power FET, by interconnecting the gate and first terminal.

Abstract: An embodiment of an IGBT comprises an emitter terminal at a first surface of a semiconductor body. The IGBT further comprises a collector terminal at a second surface of the semiconductor body. A first zone of a first conductivity type is in the semiconductor body between the first and second surfaces. A collector injection structure adjoins the second surface, the collector injection structure being of a second conductivity type and comprising a first part and a second part at a first lateral distance from each other. The IGBT further comprises a negative temperature coefficient thermistor adjoining the first zone in an area between the first and second parts.

Abstract: A transistor device includes an individual transistor cell arranged in a transistor cell field on a semiconductor body, the individual transistor cell having a gate electrode. The transistor device further includes a gate contact, electrically coupled to the gate electrode and configured to switch on the individual transistor cell by providing a gate current in a first direction and configured to switch off the individual transistor cell by providing a gate current in a second direction, the second direction being opposite to the first direction. The transistor device also includes a gate-resistor structure monolithically integrated in the transistor device. The gate-resistor structure provides a first resistance for the gate current when the gate current flows in the first direction, and provides a second resistance for the gate current, which is different from the first resistance, when the gate current flows in the second direction.

Abstract: A transistor device comprises: at least one individual transistor cell arranged in a transistor cell field on a semiconductor body, each individual transistor cell comprising a gate electrode; a gate contact, electrically coupled to the gate electrodes of the transistor cells and configured to switch on the at least one transistor cell by providing a gate current in a first direction and configured to switch off the at least one transistor cell by providing a gate current in a second direction, the second direction being opposite to the first direction; at least one gate-resistor structure monolithically integrated in the transistor device, the gate-resistor structure providing a first resistance for the gate current when the gate current flows in the first direction, and providing a second resistance for the gate current, which is different from the first resistance, when the gate current flows in the second direction.

Abstract: A transistor device comprises: at least one individual transistor cell arranged in a transistor cell field on a semiconductor body, each individual transistor cell comprising a gate electrode; a gate contact, electrically coupled to the gate electrodes of the transistor cells and configured to switch on the at least one transistor cell by providing a gate current in a first direction and configured to switch off the at least one transistor cell by providing a gate current in a second direction, the second direction being opposite to the first direction; at least one gate-resistor structure monolithically integrated in the transistor device, the gate-resistor structure providing a first resistance for the gate current when the gate current flows in the first direction, and providing a second resistance for the gate current, which is different from the first resistance, when the gate current flows in the second direction.

Abstract: A semiconductor component comprises a semiconductor body that has its underside secured on a metallic substrate and is joined at its upper side to an auxiliary member composed of a material having great thermal conductivity and which serves as a heat buffer. This auxiliary member increases the loadability of the semiconductor component with respect to additional, thermal stressing pulses.

Abstract: A semiconductor component comprises a semiconductor body that has its underside secured on a metallic substrate and is joined at its upper side to an auxiliary member composed of a material having great thermal conductivity and which serves as a heat buffer. This auxiliary member increases the loadability of the semiconductor component with respect to additional, thermal stressing pulses.

Abstract: A thyristor having low-reflection light-triggering structure. In a light-triggerable thyristor, pyramidal depressions are formed in a simple manner by a preferred etching method, being formed in the region of the photon entry face in order to produce a low-reflection light-triggering structure. Incident light is absorbed in the pyramidal depressions largely independent of the wavelength of the incident light and nearly completely. The low-reflection light-triggering structure thereby produced can be formed with relatively little outlay. This is especially true when a defined overhead ignition voltage is simultaneously set by the pyramidal depressions.

Abstract: A thyristor having low-reflection light-triggering structure. In a light-triggerable thyristor, pyramidal depressions are formed in a simple manner by a preferred etching method, being formed in the region of the photon entry face in order to produce a low-reflection light-triggering structure. Incident light is absorbed in the pyramidal depressions largely independent of the wavelength of the incident light and nearly completely. The low-reflection light-triggering structure thereby produced can be formed with relatively little outlay. This is especially true when a defined overhead ignition voltage is simultaneously set by the pyramidal depressions.