Abstract: The present invention discloses apparatus and methods for direct memory access (DMA) having particular application for use in displaying digital images in an animated form on a CRT display. The present invention includes a DMA controller coupled over a bus to a frame buffer. The frame buffer includes one or more bit maps representative of the display. A block of memory within the frame buffer is mapped onto corresponding picture elements (pixels) on the display. The frame buffer continuously scans the bit map representing the CRT screen such that modifications to data bits within the frame buffer are correspondingly displayed on the screen. A plurality of windows may be displayed on the CRT having varying predefined widths which are appropriately represented within the frame buffer.

Abstract: An improved memory organization for use in a computer display system including a display having a plurality of display pixels for defining images that includes: a frame buffer memory having a plurality of memory cells organized into a matrix, said memory comprising first and second maps wherein the contents of the maps correspond to the pixels and define characteristics of the pixels, the maps being defined along X and Z axes of the matric; reading means coupled to the frame buffer memory for selectively reading, in one memory cycle operation, a plurality of bits from memory cells defining one of the maps; writing means coupled to said frame buffer memory for selectively storing, in one memory cycle operation, a plurality of bits into memory cells defining one of the maps; control logic means coupled to the reading means and the writing means for generating control signals for selectively reading a plurality of bits from one of the maps and writing a plurality of bits into one of the maps to define the images