Abstract: A Manchester decoder and clock recovery circuit for recovering Manchester encoded data and a clock synchronized with the incoming data. The circuit uses an oversampling rate of eight times the data rate, and a reduction in circuit elements to reduce the circuit power consumption requirements. The circuit operates in a search mode and in a tracking mode. A clock phase generator produces eight phase clocks, used by a sampling and majority vote circuit to determine the decoded data value. During the tracking mode, the phase of the synchronized clock can be adjusted during data reception.