Patents by Inventor Peter W. Y. Wong

Peter W. Y. Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8205209
    Abstract: Selecting a number of processors to run an application in order to save power is performed. A number of code segments are selected from an application. Each of the code segments are executed using two or more of a plurality of processing resource combinations. Each of the code segments are scored with a performance value. The performance value indicates a performance of each code segment using each of the two or more processing resource combinations. A selection is made of one of the two or more processing resource combinations based on an associated performance value and a number of processing resources used to execute the code segment. The application is then executed using the selected processing resource combination.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: June 19, 2012
    Assignee: International Business Machines Corporation
    Inventor: Peter W. Y. Wong
  • Patent number: 8046745
    Abstract: The present invention relates to compiler generated code for parallelized code segments, wherein the generated code is used to determine if an expected number of parallel processing threads is created for a parallel processing application, in addition to determining the performance impact of using parallel threads of execution. In the event the expected number of parallel threads is not generated, notices and alerts are generated to report the thread creation problem. Further, a method is disclosed for the collection of performance metrics for N threads of execution and one thread of execution, and thereafter performing a comparison operation upon the execution threads. Notices and alerts are generated to report the resultant performance metrics for the N threads of execution versus the one thread of execution.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: October 25, 2011
    Assignee: International Business Machines Corporation
    Inventor: Peter W. Y. Wong
  • Publication number: 20090241122
    Abstract: Selecting a number of processors to run an application in order to save power is performed. A number of code segments are selected from an application. Each of the code segments are executed using two or more of a plurality of processing resource combinations. Each of the code segments are scored with a performance value. The performance value indicates a performance of each code segment using each of the two or more processing resource combinations. A selection is made of one of the two or more processing resource combinations based on an associated performance value and a number of processing resources used to execute the code segment. The application is then executed using the selected processing resource combination.
    Type: Application
    Filed: March 18, 2008
    Publication date: September 24, 2009
    Applicant: International Business Machines Corporation
    Inventor: Peter W. Y. Wong
  • Publication number: 20080134150
    Abstract: The present invention relates to compiler generated code for parallelized code segments, wherein the generated code is used to determine if an expected number of parallel processing threads is created for a parallel processing application, in addition to determining the performance impact of using parallel threads of execution. In the event the expected number of parallel threads is not generated, notices and alerts are generated to report the thread creation problem. Further, a method is disclosed for the collection of performance metrics for N threads of execution and one thread of execution, and thereafter performing a comparison operation upon the execution threads. Notices and alerts are generated to report the resultant performance metrics for the N threads of execution versus the one thread of execution.
    Type: Application
    Filed: November 30, 2006
    Publication date: June 5, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Peter W. Y. Wong
  • Publication number: 20080104362
    Abstract: A method, system, and computer program product enable the selective adjustment in the size of memory pages allocated from system memory. In one embodiment, the method includes, but is not limited to, the steps of: collecting profile data (e.g., the number of Translation Lookaside Buffer (TLB) misses, the number of page faults, and the time spent by the Memory Management Unit (MMU) performing page table walks); identifying the top N active processes, where N is an integer that may be user-defined; evaluating the profile data of the top N active processes within a given time period; and in response to a determination that the profile data indicates that a threshold has been exceeded, promoting the pages used by the top N active processes to a larger page size and updating the Page Table Entries (PTEs) accordingly.
    Type: Application
    Filed: October 25, 2006
    Publication date: May 1, 2008
    Inventors: William M. Buros, Kevin X. Lu, Santhosh Rao, Peter W. Y. Wong