Patents by Inventor Peter Washington

Peter Washington has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11920039
    Abstract: Derivatized malachite green leuco dyes for use in radio-chromic systems are described. The dyes have the following structure: in which Ar is a substituted phenyl or thiophene ring in which at least one substitution of the Ar ring is not ortho to the bond between the ring and the linking carbon, and in which R1, R2, R3, and R4 are independently selected from methyl, alkyl, or alkyl halide. The systems include the dyes in conjunction with an activator, e.g., a halogenated activator, and a carrier, e.g., a fluid carrier or an encapsulating polymeric matrix.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: March 5, 2024
    Assignees: Battelle Savannah River Alliance, LLC, University of Kentucky Research Foundation
    Inventors: Aaron L. Washington, II, John T. Bobbitt, III, John E. Anthony, Brent Peters, James C. Nicholson
  • Patent number: 11667046
    Abstract: One embodiment for splitting logs is described as including a first handle; a second handle; a unitary body wedge comprising a cutting wedge coupled to the first handle and a splitting wedge coupled to the second handle, wherein the first handle and the second handle are co-aligned along an axis of the log splitting tool when the cutting wedge and the splitting wedge form the unitary body wedge. As a user swings the log splitting tool in an overhead arc, driving the unitary body wedge into a log that is to be split, a cutting edge of the cutting wedge is driven downward into the log. The user spreads the first and second handles apart in opposing directions so that leverage created by the length of the first and second handles force the cutting wedge and the splitting wedge to separate apart from each other, causing the log to split.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: June 6, 2023
    Inventor: Peter Washington
  • Publication number: 20210001510
    Abstract: A tool for log-splitting is provided with a handle structure defining a long axis, and including a first handle and a second handle. The handles extend substantially parallel to the long axis. Coupled to the handles are an axe head including a first wedge and a second wedge with the axe head extending perpendicularly from the long axis of the handle structure to a sharpened edge. The wedges are coupled by a hinged joint providing for the first and second wedges selectively to be aligned together and to be separated. The first wedge includes a notch behind the sharpened edge and the second wedge includes a leading edge that, with the wedges aligned together, is positioned in the notch.
    Type: Application
    Filed: July 6, 2020
    Publication date: January 7, 2021
    Inventor: Peter Washington
  • Publication number: 20210001509
    Abstract: One embodiment for splitting a log comprises a first handle; a second handle; a unitary body wedge comprising a cutting wedge coupled to the first handle and a splitting wedge coupled to the second handle, wherein the first handle and the second handle are co-aligned along an axis of the log splitting tool when the cutting wedge and the splitting wedge form the unitary body wedge. As a user swings the log splitting tool in an overhead arc, driving the unitary body wedge into a log that is to be split, a cutting edge of the cutting wedge is driven downward into the log. The user spreads the first and second handles apart in opposing directions so that leverage created by the length of the first and second handles force the cutting wedge and the splitting wedge to separate apart from each other, causing the log to split.
    Type: Application
    Filed: July 1, 2020
    Publication date: January 7, 2021
    Inventor: Peter Washington
  • Patent number: 6418505
    Abstract: A multi-processor computer system that includes at least one “regular” processor and one “enhanced mode” processor. The enhanced mode processor is preferably not turned over to the regular processor, but is initialized to look like an internal or external device, such as a disk drive or the like. In a preferred embodiment, fast access memory that is outside the addressable range of the regular processor is coupled to the enhanced mode processor and accessed through a RAM-disk device driver. In this manner, the amount of fast access memory available to the regular processor is increased.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: July 9, 2002
    Assignee: NCR Corporation
    Inventors: Richard R. Barton, Peter Washington, John H. Waters
  • Patent number: 6073225
    Abstract: Memory controller logic for concurrently obtaining memory access locality information by cycle type for a large number of contiguous sections of system memory (pages) for the purposes of optimizing memory and process assignments in a multiple-node NUMA architecture computer system including a distributed system memory. Page access monitoring logic is included within each processing node which contains a portion of shared system memory. This page access monitoring logic maintains a plurality of page access counters, each page access counter corresponding to a different memory page address within the shared system memory. The monitoring logic further includes a programmable cycle control register and comparison logic to condition the page access counters for specific memory cycle types, such as coherency cycles, reads, writes, copyback cache cycles, etc.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: June 6, 2000
    Assignee: Intel Corporation
    Inventors: Larry C. James, Peter Washington
  • Patent number: 6026472
    Abstract: A hardware method to concurrently obtain memory access locality information for a large number of contiguous sections of system memory (pages) for the purposes of optimizing memory and process assignments in a multiple-node NUMA architecture computer system including a distributed system memory. Page access monitoring logic is included within each processing node which contains a portion of shared system memory. This page access monitoring logic maintains a plurality of page access counters, each page access counter corresponding to a different memory page address within the shared system memory. Whenever the processing node generates a transaction requiring access to a memory address within system memory, the page access monitoring logic increments a count value contained within the page access counter corresponding to the memory address to which access is sought. Thus, a record of memory access patterns is created which can be used to optimize memory and process assignments in the computer system.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: February 15, 2000
    Assignee: Intel Corporation
    Inventors: Larry C. James, Arthur F. Cochcroft, Jr., Peter Washington, Edward A. McDonald
  • Patent number: 5860116
    Abstract: An apparatus and method for controlling the location of pages in a system having multiple processors and multiple main memory. Local and remote accesses to main memory are monitored and when remote accesses exceed local accesses in a predefined period, steps to alleviate the volume of remote accesses are undertaken. The steps may result in the relocation of a memory page, replication of a memory page (for read only pages) and relocation of a process.
    Type: Grant
    Filed: December 11, 1996
    Date of Patent: January 12, 1999
    Assignee: NCR Corporation
    Inventor: Peter Washington
  • Patent number: 5860141
    Abstract: A method and apparatus for enabling a physical memory larger than a corresponding virtual memory. An apparatus is disclosed that includes a processor having an address word of a predefined length, a main memory having a size larger than the addressable range of the predefined address word, and virtual memory logic for configuring the processor virtual memory to contain a subset of the main memory as resident memory and pointers to the remainder of main memory. Analogous method steps are disclosed as is dividing main memory into a plurality of buffer uniquely identifiable within the address range of the predefined address word.
    Type: Grant
    Filed: December 11, 1996
    Date of Patent: January 12, 1999
    Assignee: NCR Corporation
    Inventors: Peter Washington, John H. Waters, Richard R. Barton, Vernon K. Boland
  • Patent number: 5835775
    Abstract: A method and computer system are disclosed for executing family generic, processor specific files. In accordance with one embodiment of the present invention, there is provided a method of executing a file on a computer system. The method includes the computer implemented steps of determining the processor type of a processor; storing a processor type identifier that represents the determined processor type of the processor; executing a first plurality of instructions that includes instructions exclusively from a common set of instructions that are common to a plurality of processor types; executing a second plurality of instructions that is optimized for a first processor type, if the processor type identifier indicates that the processor is of the first processor type; and executing a third plurality of instructions that includes instructions exclusively from the common set of instructions, if the processor type identifier indicates the processor is of a type different than the first processor type.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: November 10, 1998
    Assignee: NCR Corporation
    Inventors: Peter Washington, Richard R. Barton