Abstract: A voltage controlled oscillator circuit comprises a VCO resonator circuit having a first plurality of varactors for varying a frequency of the VCO resonator circuit, the VCO resonator circuit being symmetrical with respect to VCO circuit ground and providing a signal having a frequency, the frequency depending on a tuning voltage applied to the first plurality of varactors, and a second plurality of varactors for compensating a drift of the frequency depending on a compensation voltage, a temperature sensor circuit sensing an ambient temperature of the VCO resonator circuit and providing a temperature dependent signal, and a temperature compensation circuit providing the compensation voltage depending on the temperature dependent signal. Furthermore, a phase locked loop (PLL) circuit, an automotive radar device and a method for compensating a frequency drift of a VCO resonator circuit are presented.

Abstract: A voltage controlled oscillator circuit comprises a VCO resonator circuit having a first plurality of varactors for varying a frequency of the VCO resonator circuit the VCO resonator circuit being symmetrical with respect to VCO circuit ground and providing a signal having a frequency, the frequency depending on a tuning voltage applied to the first plurality of varactors, and a second plurality of varactors for compensating a drift of the frequency depending on a compensation voltage, a temperature sensor circuit sensing an ambient temperature of the VCO resonator circuit and providing a temperature dependent signal, and a temperature compensation circuit providing the compensation voltage depending on the temperature dependent signal. Furthermore, a phase locked loop (PLL) circuit, an automotive radar device and a method for compensating a frequency drift of a VCO resonator circuit are presented.

Abstract: A semiconductor device includes a mechanically strained channel, wherein the channel comprises of a single crystalline structure of a strained semiconductor layer having a non-linear geometry, the non-linear geometry including a portion of an arch shape. The semiconductor device further includes a dielectric layer, wherein a first portion of the channel is disposed overlying a point location within the dielectric layer and a second portion of the channel is disposed overlying a portion of the dielectric layer proximate to and outside of the point location. In addition, a gate is disposed proximate to the channel for controlling current flow through the channel between first and second current handling electrodes that are coupled to the channel.

Abstract: A method of forming a semiconductor device includes forming a local strain-inducing structure of a first semiconductor material at a point location within a dielectric layer. The local strain-inducing structure has a prescribed geometry with a surface disposed above a surface of the dielectric layer. A second semiconductor material is formed over the dielectric layer and the local strain inducing structure, wherein formation of a first portion of the second material over the dielectric layer provides a poly crystalline structure of the second material and wherein formation of a second portion of the second material over the local strain-inducing structure provides a single crystalline structure of the second material subject to mechanical strain by the surface of the local strain-inducing structure. The single crystalline structure serves as a strained semiconductor layer of the semiconductor device.

Abstract: A MESFET structure (20) and a method that minimizes the effects of processing steps and device performance of the MESFET structure (20). The MESFET structure (20) has a gate (30) positioned over a channel region (28) and between a source region (36) and a drain region (34). The MESFET structure (20) further includes a hole injector region (32) formed near the channel region (28). The hole injector region (32) injects holes beneath the channel region (28) which decrease the ability of the trap sites to attract electrons generated by impact ionization. Thus, this supply of holes beneath the channel region (28) prevents the effects of IV-kink and hysteresis caused by electrons that are accumulated in the trap sites.

Abstract: A light sensitive semiconductor device (10) is formed in a well region (12) in a semiconductor substrate (11). A first voltage (30) is applied to a source region (4) of the semiconductor device (10) and to a contact region (13) to the well region (12) to attract holes. A second voltage (31) is applied to the source region (14) and a drain region (16) to provide a current flow. As photons (23) from a light source are absorbed by semiconductor device (10), the source to drain current is decreased.

Abstract: A schottky diode consists of a substrate from gallium/arsenide (5) on which epitaxially a monocrystalline gallium/arsenide layer (6) doped with silicium is applied. For creating the Schottky contact, a monocrystalline erbium/arsenide layer or ytterbium/arsenide layer (7) is epitaxially applied on this layer. Following as a covering layer is a highly doped gallium/arsenide layer (8).

Abstract: In a field effect transistor, nonalloyed ohmic source-drain contacts (7, 8) are made possible, as the channel layer (3) is coated with lanthanide-arsenide which serves as contact-mediating layer and is covered with a very thin, conducting, monocrystalline, epitactic gallium-arsenide layer (10) on which nickel (11) is vaporized, an alloying step being dispensed with.

Abstract: In a field effect transistor, nonalloyed ohmic source-drain contacts (7, 8) are made possible, as the channel layer (3) is coated with lanthanide-arsenide which serves as contact-mediating layer and is covered with a very thin, conducting, monocrystalline, epitactic gallium-arsenide layer (10) on which nickel (11) is vaporized, an alloying step being dispensed with.