Patents by Inventor Peter William Harris

Peter William Harris has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210097642
    Abstract: A graphics processor performs graphics processing in respect of a region of a render output. The graphics processing comprises obtaining a scaling factor corresponding to a desired resolution for the region. The graphics processing further comprises, in accordance with the desired resolution, obtaining scaled graphics geometry to be rendered for the region and selecting a subregion of the region to be rendered in respect of the region. The selected subregion is then rendered using the scaled graphics geometry, thereby providing a subregion of data elements rendered in accordance with the desired resolution. The graphics processor can provide efficient and flexible graphics processing when performing variable resolution rendering.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 1, 2021
    Applicant: Arm Limited
    Inventors: Andreas Loeve Selvik, Samuel Martin, Peter William Harris, Jakob Axel Fries
  • Patent number: 10943385
    Abstract: When a renderer of a graphics processor is to perform a graphics rendering operation that uses one or more texture layers in accordance with contribution control data that controls the contribution that each texture layer makes to the rendering operation for a group of fragments, the renderer determines contribution control data for each fragment in the group, and based on the determined contribution control data, either: fetches and uses the texture data values for a texture layer for each fragment in the group from memory, or does not fetch texture data values for a texture layer for each fragment in the group from memory and instead uses a dummy value for the texture layer for each fragment in the group for the graphics rendering operation.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: March 9, 2021
    Assignee: Arm Limited
    Inventors: Peter William Harris, Edvard Fielding
  • Patent number: 10878527
    Abstract: A graphics processor performs graphics processing in respect of a region of a render output. The graphics processing comprises obtaining a scaling factor corresponding to a desired resolution for the region. The graphics processing further comprises, in accordance with the desired resolution, obtaining scaled graphics geometry to be rendered for the region and selecting a subregion of the region to be rendered in respect of the region. The selected subregion is then rendered using the scaled graphics geometry, thereby providing a subregion of data elements rendered in accordance with the desired resolution. The graphics processor can provide efficient and flexible graphics processing when performing variable resolution rendering.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: December 29, 2020
    Assignee: Arm Limited
    Inventors: Andreas Loeve Selvik, Samuel Martin, Peter William Harris, Jakob Axel Fries
  • Patent number: 10853905
    Abstract: When executing a shader program to perform graphics shading operations in a graphics processor, the graphics processor determines for instructions to be executed for the shader program, whether to replace the instructions with alternative instructions, based on the nature of the instructions and the values of input operands to be processed by the instructions, and either retains an instruction or replaces the instruction with an alternative instruction, accordingly.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: December 1, 2020
    Assignee: Arm Limited
    Inventor: Peter William Harris
  • Patent number: 10726606
    Abstract: When a shader program is to be executed by a graphics processor, the graphics processor is caused to execute at least two variants of the shader program and the operation of the graphics processor when executing execution threads for the different variants of the shader program is monitored. A variant of the shader program to be executed by subsequent execution threads that are to execute the shader program is then selected based on the monitoring of the operation of the shading stage when executing the execution threads for the different variants of the shader program.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: July 28, 2020
    Assignee: Arm Limited
    Inventors: Peter William Harris, Mladen Wilder
  • Patent number: 10706607
    Abstract: When a graphics texture mapping apparatus is to perform a texture filtering operation that uses the data values of a plurality of texels, the texture mapper first determines whether any of the data values of the texels to be used for the texture filtering operation are the same, and then selects a texture filtering operation to be performed using data values of the texels based on the determination. The texture mapper then performs the selected texture filtering operation using one or more of the data values of the texels to provide the required texture filtering operation output result.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: July 7, 2020
    Assignee: Arm Limited
    Inventors: Peter William Harris, Edvard Fielding, Andreas Due Engh-Halstvedt, Lukasz Kulasza
  • Publication number: 20200082491
    Abstract: When executing a shader program to perform graphics shading operations in a graphics processor, the graphics processor determines for instructions to be executed for the shader program, whether to replace the instructions with alternative instructions, based on the nature of the instructions and the values of input operands to be processed by the instructions, and either retains an instruction or replaces the instruction with an alternative instruction, accordingly.
    Type: Application
    Filed: September 10, 2018
    Publication date: March 12, 2020
    Applicant: Arm Limited
    Inventor: Peter William Harris
  • Publication number: 20200027260
    Abstract: When a renderer of a graphics processor is to perform a graphics rendering operation that uses one or more texture layers in accordance with contribution control data that controls the contribution that each texture layer makes to the rendering operation for a group of fragments, the renderer determines contribution control data for each fragment in the group, and based on the determined contribution control data, either: fetches and uses the texture data values for a texture layer for each fragment in the group from memory, or does not fetch texture data values for a texture layer for each fragment in the group from memory and instead uses a dummy value for the texture layer for each fragment in the group for the graphics rendering operation.
    Type: Application
    Filed: July 5, 2019
    Publication date: January 23, 2020
    Applicant: Arm Limited
    Inventors: Peter William Harris, Edvard Fielding
  • Publication number: 20190347757
    Abstract: A graphics processor performs graphics processing in respect of a region of a render output. The graphics processing comprises obtaining a scaling factor corresponding to a desired resolution for the region. The graphics processing further comprises, in accordance with the desired resolution, obtaining scaled graphics geometry to be rendered for the region and selecting a subregion of the region to be rendered in respect of the region. The selected subregion is then rendered using the scaled graphics geometry, thereby providing a subregion of data elements rendered in accordance with the desired resolution. The graphics processor can provide efficient and flexible graphics processing when performing variable resolution rendering.
    Type: Application
    Filed: April 22, 2019
    Publication date: November 14, 2019
    Applicant: Arm Limited
    Inventors: Andreas Loeve Selvik, Samuel Martin, Peter William Harris, Jakob Axel Fries
  • Patent number: 10432914
    Abstract: A graphics processing system includes a graphics processing pipeline, which includes a primitive generation stage and a pixel processing stage. The graphics processing system is arranged to process input data in the primitive generation stage to produce first primitive data associated with a first view of a scene and second primitive data associated with a second view of the scene. The graphics processing system is arranged to process the first primitive data in the pixel processing stage to produce first pixel-processed data associated with the first view. The graphics processing system is arranged to determine, for second pixel-processed data associated with the second view, whether to use the first pixel-processed data as the second pixel-processed data or whether to process the second primitive data in the pixel processing stage to produce the second pixel-processed data, and perform additional processing in the graphics processing pipeline based on the determining.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: October 1, 2019
    Assignee: Arm Limited
    Inventors: Peter William Harris, Robin Paul Fell, Sandeep Kakarlapudi
  • Publication number: 20190259193
    Abstract: When a shader program is to be executed by a graphics processor, the graphics processor is caused to execute at least two variants of the shader program and the operation of the graphics processor when executing execution threads for the different variants of the shader program is monitored. A variant of the shader program to be executed by subsequent execution threads that are to execute the shader program is then selected based on the monitoring of the operation of the shading stage when executing the execution threads for the different variants of the shader program.
    Type: Application
    Filed: February 19, 2019
    Publication date: August 22, 2019
    Applicant: Arm Limited
    Inventors: Peter William Harris, Mladen Wilder
  • Patent number: 10332258
    Abstract: A graphics processing system sorts graphics primitives for rendering into lists corresponding to different sub-regions of a render output to be generated, each list indicating primitives to be processed for the render output. A primitive list building unit divides a render target into various sub-regions, determines which sub-regions a primitive falls within and adds the primitive to the primitive lists corresponding to those sub-regions. The primitive list building unit also records the positions of the primitives in a pair of histograms which show the distribution of primitives across the render output. Once all primitives for the render output have been sorted into lists, the histograms are outputted to a predictor processor. The predictor processor then determines a set of sub-region sizes to be used when sorting primitives for the next render output to be generated into lists, based on the histograms.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: June 25, 2019
    Assignee: Arm Limited
    Inventors: Amir Kleen, Peter William Harris, David James Bermingham
  • Patent number: 10275848
    Abstract: The sequence of instructions for a shader program 60 to be executed by a shader core of a graphics processor is divided into an initial set of instructions 61 that perform “global” common expressions of the shader program, a set of instructions 62 in the shader program that perform expressions that are common to a given work group within a set of work items that the shader program is to process, and a main instruction sequence 63 that needs to be executed independently for each work item. Execution threads are then able to start executing the shader program either at the beginning of the global common expressions 64, or at the beginning of the work group common expressions 65, or at the beginning of the main instruction sequence 66.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: April 30, 2019
    Assignee: Arm Limited
    Inventor: Peter William Harris
  • Publication number: 20180061115
    Abstract: A graphics processing system includes a graphics processing pipeline, which includes a primitive generation stage and a pixel processing stage. The graphics processing system is arranged to process input data in the primitive generation stage to produce first primitive data associated with a first view of a scene and second primitive data associated with a second view of the scene. The graphics processing system is arranged to process the first primitive data in the pixel processing stage to produce first pixel-processed data associated with the first view. The graphics processing system is arranged to determine, for second pixel-processed data associated with the second view, whether to use the first pixel-processed data as the second pixel-processed data or whether to process the second primitive data in the pixel processing stage to produce the second pixel-processed data, and perform additional processing in the graphics processing pipeline based on the determining.
    Type: Application
    Filed: August 22, 2017
    Publication date: March 1, 2018
    Inventors: Peter William HARRIS, Robin Paul FELL, Sandeep KAKARLAPUDI
  • Patent number: 9865065
    Abstract: A graphics processing pipeline includes processing circuitry. The processing circuitry is configured to determine attribute information for an object to be rendered for a set of sampling points from a compressed representation of attribute information associated with the object, when the set of sampling points is being processed by the graphics processing pipeline to generate a render output. The processing circuitry is also configured to use the determined attribute information to control the processing of the set of sampling points by the graphics processing pipeline when generating the render output.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: January 9, 2018
    Assignee: Arm Limited
    Inventors: Peter William Harris, Sandeep Kakarlapudi, Andreas Due Engh-Halstvedt
  • Publication number: 20170309027
    Abstract: A graphics processing system sorts graphics primitives for rendering into lists corresponding to different sub-regions of a render output to be generated, each list indicating primitives to be processed for the render output. A primitive list building unit divides a render target into various sub-regions, determines which sub-regions a primitive falls within and adds the primitive to the primitive lists corresponding to those sub-regions. The primitive list building unit also records the positions of the primitives in a pair of histograms which show the distribution of primitives across the render output. Once all primitives for the render output have been sorted into lists, the histograms are outputted to a predictor processor. The predictor processor then determines a set of sub-region sizes to be used when sorting primitives for the next render output to be generated into lists, based on the histograms.
    Type: Application
    Filed: April 5, 2017
    Publication date: October 26, 2017
    Applicant: ARM Limited
    Inventors: Amir Kleen, Peter William Harris, David James Bermingham
  • Publication number: 20170024848
    Abstract: The sequence of instructions for a shader program 60 to be executed by a shader core of a graphics processor is divided into an initial set of instructions 61 that perform “global” common expressions of the shader program, a set of instructions 62 in the shader program that perform expressions that are common to a given work group within a set of work items that the shader program is to process, and a main instruction sequence 63 that needs to be executed independently for each work item. Execution threads are then able to start executing the shader program either at the beginning of the global common expressions 64, or at the beginning of the work group common expressions 65, or at the beginning of the main instruction sequence 66.
    Type: Application
    Filed: July 19, 2016
    Publication date: January 26, 2017
    Applicant: ARM Limited
    Inventor: Peter William Harris
  • Publication number: 20160247249
    Abstract: A graphics processing pipeline includes processing circuitry. The processing circuitry is configured to determine attribute information for an object to be rendered for a set of sampling points from a compressed representation of attribute information associated with the object, when the set of sampling points is being processed by the graphics processing pipeline to generate a render output. The processing circuitry is also configured to use the determined attribute information to control the processing of the set of sampling points by the graphics processing pipeline when generating the render output.
    Type: Application
    Filed: February 22, 2016
    Publication date: August 25, 2016
    Applicant: ARM Limited
    Inventors: Peter William Harris, Sandeep Kakarlapudi, Andreas Due Engh-Halstvedt
  • Patent number: 9256732
    Abstract: A smart card comprising a data store and a processor, said smart card being operable to connect with a host data processing apparatus, said smart card comprising authentication logic operable when connected to said host data processing apparatus to identify a secure data processing domain having predetermined properties within said host data processing apparatus and in response to identify said secure data processing domain, said smart card is operable to delegate at least some data processing operations to be processed within said secure data processing domain of said host data processing apparatus.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: February 9, 2016
    Assignee: ARM Limited
    Inventors: Peter William Harris, Peter Brian Wilson, Timothy Charles Thornton, David Paul Martin
  • Patent number: 8561169
    Abstract: A data processing apparatus and method are provided for managing access to a display buffer. The data processing apparatus has a display buffer for storing an array of display elements for subsequent output to a display controller, with each display element having a security permission indication associated therewith identifying whether that display element is a secure display element or a non-secure display element. At least one processing unit is provided for executing a non-secure process and a secure process, each process issuing access requests when seeking to access display elements in the display buffer, and each access request specifying a location in the display buffer. Interface logic is associated with the display buffer for receiving each access request and is arranged for at least each access request issued by the non-secure process to determine the security permission indication associated with the display element currently stored at the location specified by that access request.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: October 15, 2013
    Assignee: ARM Limited
    Inventors: Peter William Harris, Peter Brian Wilson, David Paul Martin, Timothy Charles Thornton