Abstract: A design system for generating configuration information and associated executable code based on a customisation specification, which includes application information including application source code and customisation information including design constraints, for implementing an instruction processor using re-programmable hardware, the system comprises a template generator for generating a template for each processor style identified as a candidate for implementation; an analyser for analysing instruction information for each template and determining instruction optimisations; a compiler for compiling the application source code to include the instruction optimisations and generate executable code; an instantiator for analysing architecture information for each template, determining architecture optimisations and generating configuration information including the architecture optimisations; and a builder for generating device-specific configuration information from the configuration information including the

Abstract: The present invention relates to the design-time and run-time environments of instruction processors implemented in re-programmable hardware. In one aspect the present invention provides a design system for generating configuration information and associated executable code base on a customization specification, which includes application information including application source code and customization information including design constraints, for implementing an instruction processor using re-progammable hardware, the system comprising: a template generator; an analyzer; a compiler; an instantiator, and a builder. In another aspect the present invention provides a management system for managing run-time re-configuration of an instruction processor implemented using re-programmable hardware, comprising: a configuration library; a code library; a loader; a loader controller; a run-time monitor; an optimization determiner; and an optimization instructor.

Abstract: The present invention relates to the design-time and run-time environments of instruction processors implemented in re-programmable hardware. In one aspect the present invention provides a design system for generating configuration information and associated executable code base on a customisation specification, which includes application information including application source code and customisation information including desgn constraints, for implementing an instruction processor using re-progammable hardware, the system comprising: a template generator; an analyser; a compiler; an instantiator, and a builder. In another aspect the present invention provides a management system for managing run-time re-configuration of an instruction processor implemented using re-programmable hardware, comprising: a configuration library; a code library; a loader; a loader controller; a run-time monitor; an optimisation determiner; and an optimisation instructor.

Abstract: A technique for passaging liquid through a membrane putatively containing, in its interstices, at least one substance for which detection is desired, comprises positioning donor and acceptor bibulous matrices onto either surface of the membrane and squeezing the resulting sandwich. This technique permits the application of small volumes of reagents or wash to the membranes and the facile recovery of the waste. The subject membranes are obtained, for example, by blotting developed electrophoresis gels or directly by their use as supports for specific binding assays.