Abstract: In one embodiment, a voltage sense circuit receives an ac input signal and forms a rectified output voltage that is representative of the ac input signal.

Abstract: A variable-frequency oscillator (10) is formed to change an internal delay of the oscillator inversely proportional to changes in the frequency of the oscillator.

Abstract: A variable-frequency oscillator (10) is formed to change an internal delay of the oscillator inversely proportional to changes in the frequency of the oscillator.

Abstract: A circuit (10) having multiple poles within an active frequency range employs a movable zero (66) to maintain stability in the circuit (10) under variable load conditions. A pole (62) created by a frequency compensation element (14) maintains a fixed frequency within the active frequency range of the circuit (10). In addition, a variable load impedance (36) coupled to the circuit (10) generates a load pole (64) within the active frequency range of the circuit (10) that changes frequency over time. As the load pole (64) changes frequency, the frequency of the movable zero (66) is adjusted to achieve an enhanced stability condition within the circuit (10). In one embodiment, the frequency of the movable zero (66) tracks the frequency of the load pole (64) as the load impedance (36) changes.

Abstract: A band gap reference (32) provides low noise operation utilizing capacitor (98) to produce a low pass filter operating with high impedance node (104). Increased speed is realized using feedback signals at nodes (102) and (100) to control differential transistor pair (36, 42). A first current feedback stage using transistors (44, 50, 52 and 54) and a second current feedback stage using transistors (60, 62, 68, 70) is used to control current mirror stages which set the charge and discharge current at node (104). A first current mirror stage using transistors (64,76) comprise the current sink used to discharge capacitor (98) at node (104) and a second current mirror stage using transistors (58,74) comprise the current source used to charge capacitor (98) at node (104).

Abstract: A band gap reference (32) provides low noise operation utilizing capacitor (98) to produce a low pass filter operating with high impedance node (104). Increased speed is realized using feedback signals at nodes (102) and (100) to control differential transistor pair (36, 42). A first current feedback stage using transistors (44, 50, 52 and 54) and a second current feedback stage using transistors (60, 62, 68, 70) is used to control current mirror stages which set the charge and discharge current at node (104). A first current mirror stage using transistors (64,76) comprise the current sink used to discharge capacitor (98) at node (104) and a second current mirror stage using transistors (58,74) comprise the current source used to charge capacitor (98) at node (104).

Abstract: A circuit (10) having multiple poles within an active frequency range employs a movable zero (66) to maintain stability in the circuit (10) under variable load conditions. A pole (62) created by a frequency compensation element (14) maintains a fixed frequency within the active frequency range of the circuit (10). In addition, a variable load impedance (36) coupled to the circuit (10) generates a load pole (64) within the active frequency range of the circuit (10) that changes frequency over time. As the load pole (64) changes frequency, the frequency of the movable zero (66) is adjusted to achieve an enhanced stability condition within the circuit (10). In one embodiment, the frequency of the movable zero (66) tracks the frequency of the load pole (64) as the load impedance (36) changes.

Abstract: A driver circuit (30) is implemented within voltage regulator (10) to achieve improved dynamic performance of voltage regulator (10) while reducing the quiescent current required by driver (30). Depletion mode transistor (42) provides sufficient charge capability to the gate of transistor (34) and enhanced mode transistor (40) provides sufficient discharge capability to the gate of transistor (34). The charge and discharge capabilities of transistors (42 and 40) enables the feedback signal at node (32) to track the input voltage at terminal (IN) more effectively. Since transistor (40) is non-conductive at steady state, the quiescent current requirement of driver (30) at steady state is determined by current source (44).

Abstract: A stable voltage reference (12) receives an unregulated voltage (Vdd) as input and provides a low voltage, stable output reference (VREF). Voltage reference (12) utilizes a cascaded reference cell configuration where the first reference cell comprises a constant current source (18) and a diode (20) and the second reference cell comprises a constant current source (26) and a diode (28). A buffer (24) is configured as a source follower which allows cascading of the two reference cells with minimal voltage drop while providing improved PSRR performance.

Abstract: For use in a regulator, a driver (200) has a first transistor pair (203, 204) for alternatively pulling a drive line (OUT, 196) to magnitudes in a limited magnitude range between first and second reference lines (191, 192) depending on an input signal (IN, 195). Parallel to the first pair (203, 204), a second transistor pair (212, 210) alternatively pulls the drive line (OUT, 196) substantially to the reference lines (191, 192). The second pair (212, 210) is controlled by a comparator arrangement (120, 130) comparing the input signal to first (REF—1) and second (REF—2) reference signals and activating the second pair (212, 210) substantially only when the signal (OUT) on the drive line (196) driven by the first pair reaches a magnitude limit. The transistors (203, 204) of the first pair are arranged as emitter followers and the transistors (212, 210) of the second pair are arranged as switched current sources.

Abstract: For use in a regulator, a driver (200) has a first transistor pair (203, 204) for alternatively pulling a drive line (OUT, 196) to magnitudes in a limited magnitude range between first and second reference lines (191, 192) depending on an input signal (IN, 195). Parallel to the first pair (203, 204), a second transistor pair (212, 210) alternatively pulls the drive line (OUT, 196) substantially to the reference lines (191, 192). The second pair (212, 210) is controlled by a comparator arrangement (120, 130) comparing the input signal to first (REF—1) and second (REF—2) reference signals and activating the second pair (212, 210) substantially only when the signal (OUT) on the drive line (196) driven by the first pair reaches a magnitude limit. The transistors (203, 204) of the first pair are arranged as emitter followers and the transistors (212, 210) of the second pair are arranged as switched current sources.

Abstract: A regulator (200) has a pass transistor (250) for transferring a voltage from an input (202) to an output (205). A voltage sensor (231) at the output (205) carries a PTAT current (IA) A generator with diode or transistor chains (271, 272) derives a voltage VRES from serially coupled base-emitter path of transistors (381-386) having different current densities. The generator (271, 272) and a transistor pair (273) form a bandgap reference circuit. Each chain (271, 272) has transistors alternatively of a first type (pnp) and second type (npn). The value ratio (R4/R3) of resistances (240, 230) in the voltage sensor (231) can be chosen such, that the noise components of the voltage VOUT at the output (205) is low.

Abstract: A system (200) comprises a regulator (250), a battery unit (220), a voltage sensitive circuit (210, e.g., memory circuit) and a switchable sensor (280). The battery unit (220), the memory circuit (210) and the switchable sensor (280) are parallel coupled to terminals (266 and 264) of the regulator (250). The switchable sensor (280) itself has a serially coupled voltage sensor (230) and switch (240). In a first operating mode, the regulator (250) provides a voltage V.sub.2 to the memory circuit (210) and to the switchable sensor (280). The switch (240) is closed. The voltage sensor (230) measures the voltage V.sub.2 and communicates the result to the regulator (250) via a signal input (267). In a second operating mode, the regulator (250) does not provide the voltage V.sub.2. The switch (240) is open. The battery unit (220) provides a voltage V.sub.4 to the memory circuit (210), but not to the voltage sensor (230).

Abstract: In an electronic system (100), a regulator (200) couples a supply device (110) to a consuming device (120) through a series switch (210) and provides output current I.sub.OUT. A shunt switch (220) is provided across the output. Fast changes of I.sub.OUT due to switching on and off the consuming device (120) are accommodated by the regulator (200). The regulator (200) has a voltage divider (250, 260) to measure V.sub.OUT. Operational amplifiers (230 and 240') control transistors (210, 220) with different switching thresholds, They compare a measurement voltage V.sub.M derived from V.sub.OUT to a reference voltage V.sub.REF. When the consuming device (120) is switched off, the first amplifier (230) makes the series transistor (210) non-conductive; and then the second amplifier (240') makes the shunt transistor (220) conductive for a short time. Capacitance at the output node (205) is substantially discharged. After overshooting, the voltage V.sub.OUT returns to its previous value. Unwanted undershooting of V.

Abstract: A first current (Iptat) having a magnitude proportional to absolute temperature is passed through a resistor (R3) and a PN-junction (QA) to produce first and second voltages (Vr+Vbe) having, respectively, positive and negative temperature coefficients which when summed provide a temperature stabilized internal reference voltage (Vbgrl). This internal reference voltage (Vbgrl) powers the current generator for currents (I1, 12)) which pass through a second resistor (R8, R9) and a second PN junction (Q20A, Q20B) to produce third and fourth voltages having respectively, positive and negative temperature coefficients which when summed provide a temperature stabilized external reference voltage (Vbgrl) having improved ripple rejection. There is no feedback from the external reference voltage (Vbgr2, V-out) to the first current (Iptat) generator (42).

Abstract: In a bandgap reference circuit (200), a base-emitter voltage V.sub.BE with a first temperature coefficient TC.sub.1 is added to a voltage difference .DELTA.V with a second, opposite temperature coefficient TC.sub.2 by two resistors (210,220). The bandgap reference circuit (200) comprises current sources (271-276) and bipolar transistors Q(1) to Q(K) (281-286) of pnp-type and npn-type. Current densities in Q(1) to Q(6) are distributed so that some base-emitter voltages V.sub.BEk in Q(1) to Q(6) are different. The bases and emitters of Q(1) to Q(6) are serially coupled so that pn-junctions are arranged in a alternative directions, thus adding only the differences of V.sub.BEk but not adding their absolute values. This feature makes the circuit (200) applicable in a low voltage environment. The ratio between the two resistors (210,220) can have a value which minimizes noise voltages V.sub.N so that external filtering capacitors are not required.

Abstract: A band-gap voltage reference (39) has a regulator portion (70) providing a substantially constant current of predetermined magnitude Ic and a band-gap reference portion (72) receiving Ic. The reference portion (72) has a first branch including a first transistor (52) of a first type serially coupled to a second transistor (55) of a second type, a second branch including a third transistor (53) of the first type serially coupled to a fourth transistor (56) of the second type, the first and second branches forming a current mirror (73) carrying a total current of about Ic/2, and a third branch (57) in parallel with the first and second branches and carrying a current of substantially Ic-Ic/2. Base current (65) in the first two branches is compensated by base current (64) of the third branch.

Abstract: A power switching circuit includes a power switching NPN transistor (1) having its collector electrode coupled to a reference potential terminal (17) and its emitter electrode coupled to an output terminal (7). A driver circuit (5) is provided having an input coupled to a supply terminal (6) and a driving current output coupled to the base electrode of the power transistor (1). A PNP transistor(4) has its emitter electrode coupled to the output terminal(7), its base electrode coupled to a reference voltage terminal (9) for receiving, in operation, a voltage which is positive relative to the reference potential and its collector electrode coupled to the base electrode of an NPN transistor (2). The NPN transistor (2) has its collector electrode coupled to the collector electrode of the power transistor (1) and its emitter electrode coupled to the base electrode of the power transistor (1).