Patents by Inventor Petri Räisänen

Petri Räisänen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12351902
    Abstract: A method may comprise disposing vanadium tetrachloride in a delivery vessel; delivering the vanadium tetrachloride to a reaction chamber in fluid communication with the delivery vessel; mitigating the delivery of decomposition products of the vanadium tetrachloride to the reaction chamber; and/or applying the vanadium tetrachloride to a substrate disposed in the reaction chamber to form a layer comprising vanadium on the substrate.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: July 8, 2025
    Assignee: ASM IP Holding B.V.
    Inventors: Charles Dezelah, Qi Xie, Petri Raisanen, Dieter Pierreux, Bert Jongbloed, Werner Knaepen, Eric James Shero
  • Publication number: 20250176248
    Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 29, 2025
    Inventors: Suvi Haukka, Michael Givens, Eric Shero, Jerry Winkler, Petri Raisanen, Timo Asikainen, Chiyu Zhu, Jaako Anttila
  • Publication number: 20250166995
    Abstract: Methods and systems for depositing a layer, comprising one or more of vanadium boride and vanadium phosphide, onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process. The deposition process can include providing a vanadium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. Exemplary structures can include field effect transistor structures, such as gate all around structures. The layer comprising one or more of vanadium boride and vanadium phosphide can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.
    Type: Application
    Filed: January 23, 2025
    Publication date: May 22, 2025
    Inventors: Petro Deminskyi, Charles Dezelah, Jiyeon Kim, Giuseppe Alessio Verni, Maart Van Druenen, Qi Xie, Petri Räisänen
  • Publication number: 20250092519
    Abstract: Various embodiments of the present technology may provide a system with a bypass line to a foreline of a reaction chamber. The system may include a pump coupled to the foreline. The system may include a pressure-flow controller upstream from the bypass line. The bypass line may be coupled to the foreline at the pump inlet. The bypass line may include a low-flow pathway where the conductance is between 1% and 10% relative to unrestricted flow. The bypass line can comprise a decomposition device configured to decompose the fluid (e.g., gas) in the bypass line.
    Type: Application
    Filed: September 11, 2024
    Publication date: March 20, 2025
    Inventors: Jereld Lee Winkler, Petri Raisanen
  • Publication number: 20250081588
    Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.
    Type: Application
    Filed: November 18, 2024
    Publication date: March 6, 2025
    Inventors: Chiyu Zhu, Kiran Shrestha, Petri Raisanen, Michael Eugene Givens
  • Patent number: 12243747
    Abstract: Methods and systems for depositing a layer, comprising one or more of vanadium boride and vanadium phosphide, onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process. The deposition process can include providing a vanadium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. Exemplary structures can include field effect transistor structures, such as gate all around structures. The layer comprising one or more of vanadium boride and vanadium phosphide can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: March 4, 2025
    Assignee: ASM IP Holding B.V.
    Inventors: Petro Deminskyi, Charles Dezelah, Jiyeon Kim, Giuseppe Alessio Verni, Maart Van Druenen, Qi Xie, Petri Räisänen
  • Patent number: 12237392
    Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: February 25, 2025
    Assignee: ASM IP Holding B.V.
    Inventors: Suvi Haukka, Michael Givens, Eric Shero, Jerry Winkler, Petri Räisänen, Timo Asikainen, Chiyu Zhu, Jaakko Anttila
  • Publication number: 20250037995
    Abstract: Methods are provided herein for deposition of oxide films. Oxide films may be deposited, including selective deposition of oxide thin films on a first surface of a substrate relative to a second, different surface of the same substrate. For example, an oxide thin film such as an insulating metal oxide thin film may be selectively deposited on a first surface of a substrate relative to a second, different surface of the same substrate. The second, different surface may be an organic passivation layer.
    Type: Application
    Filed: October 14, 2024
    Publication date: January 30, 2025
    Inventors: Suvi P. Haukka, Elina Färm, Raija H. Matero, Eva E. Tois, Hidemi Suemori, Antti Juhani Niskanen, Sung-Hoon Jung, Petri Räisänen
  • Patent number: 12166099
    Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.
    Type: Grant
    Filed: July 3, 2023
    Date of Patent: December 10, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Chiyu Zhu, Kiran Shrestha, Petri Raisanen, Michael Eugene Givens
  • Publication number: 20240395555
    Abstract: Methods and systems for depositing chromium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process, depositing a chromium nitride layer onto a surface of the substrate. The deposition process can include providing a chromium precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The deposition process may be a thermal cyclical deposition process.
    Type: Application
    Filed: August 1, 2024
    Publication date: November 28, 2024
    Inventors: Qi Xie, Eric James Shero, Charles Dezelah, Giuseppe Alessio Verni, Petri Raisanen
  • Patent number: 12154785
    Abstract: Methods are provided herein for deposition of oxide films. Oxide films may be deposited, including selective deposition of oxide thin films on a first surface of a substrate relative to a second, different surface of the same substrate. For example, an oxide thin film such as an insulating metal oxide thin film may be selectively deposited on a first surface of a substrate relative to a second, different surface of the same substrate. The second, different surface may be an organic passivation layer.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: November 26, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Suvi P. Haukka, Elina Färm, Raija H. Matero, Eva E. Tois, Hidemi Suemori, Antti Juhani Niskanen, Sung-Hoon Jung, Petri Räisänen
  • Patent number: 12087586
    Abstract: Methods and systems for depositing chromium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process, depositing a chromium nitride layer onto a surface of the substrate. The deposition process can include providing a chromium precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The deposition process may be a thermal cyclical deposition process.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: September 10, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Qi Xie, Eric James Shero, Charles Dezelah, Giuseppe Alessio Verni, Petri Raisanen
  • Publication number: 20240218505
    Abstract: Methods of forming molybdenum silicide are disclosed. Exemplary methods can include selectively forming molybdenum silicide on a first surface relative to a second surface. Additionally or alternatively, exemplary methods can include a cleaning step prior to forming the molybdenum silicide.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 4, 2024
    Inventors: Jiyeon Kim, YoungChol Byun, Petri Raisanen, Sang Ho Yu, Sukanya Datta, Chiyu Zhu, Jan Willem Maes, Saima Ali, Elina Färm
  • Patent number: 12018365
    Abstract: A semiconductor processing apparatus is disclosed. The apparatus may include, a reaction chamber and a susceptor dispose in the reaction chamber configured for supporting a substrate thereon, the susceptor comprising a plurality of through-holes in an axial direction of the susceptor. The apparatus may also include, a plurality of lift pins, each of the lift pins being disposed within a respective through-hole, and at least one gas transmitting channel comprising one or more gas channel outlets, the one or more gas channel outlets being disposed proximate to the through-holes. Methods for processing a substrate within a reaction chamber are also disclosed.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: June 25, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Petri Raisanen, David Marquardt, Thomas Aswad
  • Patent number: 12020938
    Abstract: A method of forming an electrode on a substrate is disclosed. The method may include: contacting the substrate with a first vapor phase reactant comprising a titanium tetraiodide (TiI4) precursor; contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor; and depositing a titanium nitride layer over a surface of the substrate thereby forming the electrode; wherein the titanium nitride layer has an electrical resistivity of less than 400 ??-cm. Related semiconductor device structures including a titanium nitride electrode deposited by the methods of the disclosure are also provided.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: June 25, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Moataz Bellah Mousa, Peng-Fu Hsu, Ward Johnson, Petri Raisanen
  • Patent number: 11926895
    Abstract: Methods of forming thin-film structures including metal carbide material, and structures and devices including the metal carbide material are disclosed. Exemplary structures include metal carbide material formed using two or more different processes (e.g., two or more different precursors), which enables tuning of various metal carbide material properties, including resistivity, current leakage, and work function.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: March 12, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Petri Raisanen, Michael Givens, Eric James Shero
  • Patent number: 11837483
    Abstract: An apparatus and method for reducing moisture within a wafer handling chamber is disclosed. The moisture reduction results in reduced oxidation of a wafer. The moisture reduction is made possible through use of valves and purging gas. Operation of the valves may result in improved localized purging.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: December 5, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Petri Raisanen, Ward Johnson
  • Publication number: 20230357924
    Abstract: Vapor deposition methods and related systems are provided for depositing layers comprising vanadium and oxygen. In some embodiments, the methods comprise contacting a substrate in a reaction space with alternating pulses of a vapor-phase vanadium precursor and a vapor-phase oxygen reactant. The reaction space may be purged, for example, with an inert gas, between reactant pulses. The methods may be used to fill a gap on a substrate surface. Reaction conditions, including deposition temperature and reactant pulse and purge times may be selected to achieve advantageous gap fill properties. In some embodiments, the substrate on which deposition takes place is maintained at a relatively low temperature, for example between about 50° C. and about 185° C.
    Type: Application
    Filed: April 28, 2023
    Publication date: November 9, 2023
    Inventors: Eric James Shero, Charles Dezelah, Ren-Jie Chang, Qi Xie, Perttu Sippola, Petri Raisanen
  • Publication number: 20230352556
    Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.
    Type: Application
    Filed: July 3, 2023
    Publication date: November 2, 2023
    Inventors: Chiyu Zhu, Kiran Shrestha, Petri Raisanen, Michael Eugene Givens
  • Patent number: 11791153
    Abstract: Methods for forming hafnium oxide within a three-dimensional structure, such as in a high aspect ratio hole, are provided. The methods may include depositing a first hafnium-containing material, such as hafnium nitride or hafnium carbide, in a three-dimensional structure and subsequently converting the first hafnium-containing material to a second hafnium-containing material comprising hafnium oxide by exposing the first hafnium-containing material to an oxygen reactant. The volume of the second hafnium-containing material may be greater than that of the first hafnium-containing material. Voids or seams formed during the deposition of the first hafnium-containing material in the three-dimensional structure may be filled by the expanded material after exposing the first hafnium-containing material to the oxygen reactant. Thus, the three-dimensional structure, such as a high aspect ratio hole, can be filled with hafnium oxide substantially free of voids or seams.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: October 17, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Jiyeon Kim, Petri Raisanen, Sol Kim, Ying-Shen Kuo, Michael Schmotzer, Eric James Shero, Paul Ma