Patents by Inventor Petri Viljo Emil Piironen

Petri Viljo Emil Piironen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Digital circuit for measuring the power of a signal
    Patent number: 7010439
    Abstract: The invention relates to a digital circuit making it possible to measure the effective voltage of a signal, comprising at least one module exhibiting a sampler stage exhibiting an output generating an output logic signal which, for each given sampling period, exhibits a level representing the value of the voltage of the signal with respect to a given threshold (A), characterized in that it comprises a circuit (CIRC) for calculating a value representative of said effective voltage as a function of the difference between the number of times the output logic signal indicates that the voltage of the signal is above the given threshold (A) and the number of times the output logic signal indicates that this value is below said given threshold (A) over a duration corresponding to N given sampling periods.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: March 7, 2006
    Assignee: Agence Spatiale Europeenne
    Inventors: Manuel Martin Neira, Petri Viljo Emil Piironen, Adriano José Camps Carmona, Luis Sempere Payá
  • Digital circuit for measuring the power of a signal
    Publication number: 20030187596
    Abstract: The invention relates to a digital circuit making it possible to measure the effective voltage of a signal, comprising at least one module exhibiting a sampler stage exhibiting an output generating an output logic signal which, for each given sampling period, exhibits a level representing the value of the voltage of the signal with respect to a given threshold (A), characterized in that it comprises a circuit (CIRC) for calculating a value representative of said effective voltage as a function of the difference between the number of times the output logic signal indicates that the voltage of the signal is above the given threshold (A) and the number of times the output logic signal indicates that this value is below said given threshold (A) over a duration corresponding to N given sampling periods.
    Type: Application
    Filed: March 19, 2003
    Publication date: October 2, 2003
    Applicant: Agence Spatiale Europeenne
    Inventors: Manuel Martin Neira, Petri Viljo Emil Piironen, Adriano Jose Camps Carmona