Abstract: A first resistor (R.sub.1) and a first capacitor (C.sub.1) constitute a filter arrangement having a time constant which is not very accurate due to the inaccuracy of the resistor and the capacitor values in integrated circuits. The time constant is adjusted using a circuit comprising a reference resistor (R.sub.2) and a switched capacitor (C.sub.3). The value of the reference resistor (R.sub.2) and the equivalent resistance of the switched capacitor (C.sub.3) are compared by means of an integrator (C.sub.2, 2) from whose output (9) a control voltage is taken via a hold circuit (C.sub.4, C.sub.5). The control voltage is equal to the voltage at that point on the reference resistor where the resistance value is equal to that of the switched capacitor (C.sub.3). By means of comparators (21 to 30) and switches (S.sub.11 to S.sub.20) a percentage of the total resitance of the first resistor (R.sub.1) is short-circuited. This percentage is equal to the difference between the resistance of the reference resistor (R.

Abstract: A dynamic circulation memory is provided comprising a charge transfer device with surplus-value storage and an adaptive refreshing circuit for maximum information storage. Reference-charge packets are passed through the charge transfer device together with the signal-charge packets, so that signal distortion caused by the charge transfer device and its interface is compensated for.