Patents by Inventor Petrus Sebastiaan Adrianus Daniel Evers

Petrus Sebastiaan Adrianus Daniel Evers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9043770
    Abstract: In one embodiment, a machine-implemented method programs a heterogeneous multi-processor computer system to run a plurality of program modules, wherein each program module is to be run on one of the processors The system includes a plurality of processors of two or more different processor types. According to the recited method, machine-implemented offline processing is performed using a plurality of SIET tools of a scheduling information extracting toolkit (SIET) and a plurality of SBT tools of a schedule building toolkit (SBT). A program module applicability analyzer (PMAA) determines whether a first processor of a first processor type is capable of running a first program module without compiling the first program module. Machine-implemented online processing is performed using realtime data to test the scheduling software and the selected schedule solution.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: May 26, 2015
    Assignee: LSI Corporation
    Inventors: Pavel Aleksandrovich Aliseychik, Petrus Sebastiaan Adrianus Daniel Evers, Denis Vasilevich Parfenov, Alexander Nikolaevich Filippov, Denis Vladimirovich Zaytsev
  • Publication number: 20140007043
    Abstract: In one embodiment, a machine-implemented method programs a heterogeneous multi-processor computer system to run a plurality of program modules, wherein each program module is to be run on one of the processors The system includes a plurality of processors of two or more different processor types. According to the recited method, machine-implemented offline processing is performed using a plurality of SIET tools of a scheduling information extracting toolkit (SIET) and a plurality of SBT tools of a schedule building toolkit (SBT). A program module applicability analyzer (PMAA) determines whether a first processor of a first processor type is capable of running a first program module without compiling the first program module. Machine-implemented online processing is performed using realtime data to test the scheduling software and the selected schedule solution.
    Type: Application
    Filed: January 23, 2013
    Publication date: January 2, 2014
    Applicant: LSI CORPORATION
    Inventors: Pavel Aleksandrovich Aliseychik, Petrus Sebastiaan Adrianus Daniel Evers, Denis Vasilevich Parfenov, Alexander Nikolaevich Filippov, Denis Vladimirovich Zaytsev
  • Publication number: 20140007044
    Abstract: In one embodiment, a machine-implemented method programs a heterogeneous multi-processor computer system to run a plurality of program modules, wherein each program module is to be run on one of the processors. The system comprising a plurality of processors of two or more different processor types. Machine-implemented offline processing is performed using a plurality of SIET tools of a scheduling information extracting toolkit (SIET) and a plurality of SBT tools of a schedule building toolkit (SBT). Machine-implemented online processing is performed using realtime data to test the scheduling software and the selected schedule solution. A Source Code Generator (SCG) integrates scheduling information for the selected schedule solution into the scheduling software for a first processor such that the scheduling information is compiled with the scheduling software.
    Type: Application
    Filed: January 25, 2013
    Publication date: January 2, 2014
    Applicant: LSI CORPORATION
    Inventors: Pavel Aleksandrovich Aliseychik, Petrus Sebastiaan Adrianus Daniel Evers, Denis Vasilevich Parfenov, Alexander Nikolaevich Filippov, Denis Vladimirovich Zaytsev