Abstract: A novel digital attenuator circuit and associated pre-power amplifier (PPA) that substantially increases the dynamic range of the amplifier. Increased dynamic range is achieved by placing a digital current attenuator circuit at the output of the pre-power amplifier so that the minimum possible current output of the transistor switch array of the PPA can be further attenuated. The attenuator functions to split the current between the load and the power supply VDD (i.e. AC ground) based on device ratio that is controlled digitally via an input power control word. The digital attenuator is constructed as a segmented digitally controlled matrix or cell array comprising at least a pass and bypass matrix or array. The pass matrix controls the amount of current output from the PPA while the bypass matrix controls the amount of current shorted to the AC ground (i.e. power supply). By varying the number of transistors on or off in each matrix, the power output of the PPA can be easily and accurately controlled.

Abstract: A novel and useful load compensation circuit and associated pre-power amplifier constructed therefrom. The load compensation circuit functions to maintain a nearly constant output impedance of the pre-power amplifier by use of a switch matrix comprising a plurality of transistors. The switch matrix is placed in parallel with the output of the pre-power amplifier (PPA). Transistors are turned on or off within the load compensation switch matrix so as to maintain a nearly constant output impedance of the PPA throughout the entire modulation range. At maximum PPA output power, all transistors in the load compensation switch matrix are turned off thereby minimizing the extra output loading and reducing the overall power output. As output power decreases, additional numbers of transistors in the load compensation switch matrix are turned on so as to maintain a constant output impedance of the PPA.

Abstract: A method for generating a plurality of enhanced accuracy current slopes includes providing a plurality of current slopes and summing signals indicative of each of the plurality of current slopes to generate a current slope sum. The method also includes generating an enhanced accuracy current slope sum based on the current slope sum and generating the plurality of enhanced accuracy current slopes based on the enhanced accuracy current slope sum such that each respective ratio between each enhanced accuracy current slope and the enhanced accuracy current slope sum is approximately equal to each respective ratio between each signal indicative of the corresponding current slope and the current slope sum.

Abstract: The present invention relates to a single-to-differential signal transformation circuit which comprises a differential signal generation circuit which is operable to receive a single-ended signal and generate a pair of differential signals having a phase relationship associated therewith. The transformation circuit further comprises a phase analysis circuit operably coupled to the differential signal generation circuit which is operable to ascertain the phase relationship between the differential signals and generate a status indication associated therewith. In addition, a compensation circuit is operably coupled to the phase analysis circuit and is operable to alter a function of the transformation circuit based on the status indication from the phase analysis circuit such that the altered function causes the phase relationship of the differential signals which form a circuit output to be closer to 180 degrees than an initial phase relationship generated by the differential signal generation circuit.