Patents by Inventor Peyman Sana

Peyman Sana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8450603
    Abstract: In this presentation, we have shown new methods, devices, and systems, to concentrate the light for the solar cells, using refractive index variations, light funnels, liquid crystals, and other methods and materials. We have shown various methods for enhancing the solar cell efficiency. We have given many variations for each application.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: May 28, 2013
    Assignee: BTPatent LLC
    Inventors: Saied Tadayon, Peyman Sana
  • Publication number: 20120037205
    Abstract: In this presentation, we have shown new methods, devices, and systems, to concentrate the light for the solar cells, using refractive index variations, light funnels, liquid crystals, and other methods and materials. We have shown various methods for enhancing the solar cell efficiency. We have given many variations for each application.
    Type: Application
    Filed: August 16, 2010
    Publication date: February 16, 2012
    Inventors: Saied Tadayon, Peyman Sana
  • Patent number: 7943410
    Abstract: An embedded MEMS semiconductor substrate is set forth and can be a starting material for subsequent semiconductor device processing. A MEMS device is formed in a semiconductor substrate, including at least one MEMS electrode and a buried silicon dioxide sacrificial layer has been applied for releasing the MEMS. A planarizing layer is applied over the substrate, MEMS device and MEMS electrode. A polysilicon protection layer is applied over the planarizing layer. A silicon nitride capping layer is applied over the polysilicon protection layer. A polsilicon seed layer is applied over the polysilicon nitride capping layer. The MEMS device is released by removing at least a portion of the buried silicon dioxide sacrificial layer and an epitaxial layer is grown over the polysilicon seed layer to be used for subsequent semiconductor wafer processing.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: May 17, 2011
    Assignee: STMicroelectronics, Inc.
    Inventors: Olivier Le Neel, Peyman Sana, Loi Nguyen, Venkatesh Mohanakrishnaswamy
  • Publication number: 20100140724
    Abstract: An embedded MEMS semiconductor substrate is set forth and can be a starting material for subsequent semiconductor device processing. A MEMS device is formed in a semiconductor substrate, including at least one MEMS electrode and a buried silicon dioxide sacrificial layer has been applied for releasing the MEMS. A planarizing layer is applied over the substrate, MEMS device and MEMS electrode. A polysilicon protection layer is applied over the planarizing layer. A polysilicon nitride capping layer is applied over the polysilicon protection layer. A polysilicon seed layer is applied over the polysilicon nitride capping layer. The MEMS device is released by removing at least a portion of the buried silicon dioxide sacrificial layer and an epitaxial layer is grown over the polysilicon seed layer to be used for subsequent semiconductor wafer processing.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 10, 2010
    Applicant: STMicroelectronics, Inc.
    Inventors: Olivier LE NEEL, Peyman Sana, Loi Nguyen, Venkatesh Mohanakrishnaswamy
  • Patent number: 6940151
    Abstract: A low-thermal budget, silicon-rich silicon nitride film may include a concentration of hydrogen in Si—H bonds being at least 1.5 times as great as a concentration of hydrogen in N—H bonds. The silicon nitride film suppresses boron diffusion in boron-doped devices when such devices are processed using high-temperature processing operations that conventionally urge boron diffusion. The low-thermal budget, silicon-rich silicon nitride film may be used to form spacers in CMOS devices, it may be used as part of a dielectric stack to prevent shorting in tightly packed SRAM arrays, and it may be used in BiCMOS processing to form a base nitride layer and/or nitride spacers isolating the base from the emitter. Furthermore the low-thermal budget, silicon-rich silicon nitride film may remain covering the CMOS structure while bipolar devices are being formed, as it suppresses the boron diffusion that results in boron penetration and boron-doped poly depletion.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: September 6, 2005
    Assignee: Agere Systems, Inc.
    Inventors: Michael Scott Carroll, Yi Ma, Minesh Amrat Patel, Peyman Sana
  • Publication number: 20040061179
    Abstract: A low-thermal budget, silicon-rich silicon nitride film may include a concentration of hydrogen in Si—H bonds being at least 1.5 times as great as a concentration of hydrogen in N—H bonds. The silicon nitride film suppresses boron diffusion in boron-doped devices when such devices are processed using high-temperature processing operations that conventionally urge boron diffusion. The low-thermal budget, silicon-rich silicon nitride film may be used to form spacers in CMOS devices, it may be used as part of a dielectric stack to prevent shorting in tightly packed SRAM arrays, and it may be used in BiCMOS processing to form a base nitride layer and/or nitride spacers isolating the base from the emitter. Furthermore the low-thermal budget, silicon-rich silicon nitride film may remain covering the CMOS structure while bipolar devices are being formed, as it suppresses the boron diffusion that results in boron penetration and boron-doped poly depletion.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Inventors: Michael Scott Carroll, Yi Ma, Minesh Amrat Patel, Peyman Sana
  • Patent number: RE45286
    Abstract: An embedded MEMS semiconductor substrate is set forth and can be a starting material for subsequent semiconductor device processing. A MEMS device is formed in a semiconductor substrate, including at least one MEMS electrode and a buried silicon dioxide sacrificial layer has been applied for releasing the MEMS. A planarizing layer is applied over the substrate, MEMS device and MEMS electrode. A polysilicon protection layer is applied over the planarizing layer. A silicon nitride capping layer is applied over the polysilicon protection layer. A polsilicon seed layer is applied over the polysilicon nitride capping layer. The MEMS device is released by removing at least a portion of the buried silicon dioxide sacrificial layer and an epitaxial layer is grown over the polysilicon seed layer to be used for subsequent semiconductor wafer processing.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: December 9, 2014
    Assignee: STMicroelectronics, Inc.
    Inventors: Olivier Le Neel, Peyman Sana, Loi Nguyen, Venkatesh Mohanakrishnaswamy