Abstract: A system for maintaining a vehicle including a shift-by-wire transmission in a neutral-hold mode is provided. The system includes a transmission control unit in signal communication with the shift-by-wire transmission and an internal control unit of the vehicle. The transmission control unit is configured to control a gear configuration of the shift-by-wire transmission. An external control unit is in signal communication with the transmission control unit. The external control unit is configured to transmit a neutral-hold mold activation signal.

Abstract: A method of treating wastewater sources such as sewer systems or those from pulp and paper mills which contain biomass waste involves adding white rot fungi in the presence of glucose. While glucose may be directly added to the wastewater source, it has been found to be more economical to reduce or substantially remove color from the wastewater by additionally adding brown rot fungi in the presence of cellulose and hemi-cellulose. The addition of bacteria has also been found helpful to improve the reduction in color, biological oxygen demand, as well as chemical oxygen demand in wastewater sludge reduction.

Abstract: A method of treating wastewater sources such as those from pulp and paper mills which contain lignin involves adding white rot fungi in the presence of glucose. While glucose may be directly added to the wastewater source, it has been found to be more economical to reduce or substantially remove color from the wastewater by additionally adding brown rot fungi in the presence of cellulose and hemi-cellulose. The addition of bacteria has also been found helpful to improve the reduction in color, biological oxygen demand, as well as chemical oxygen demand in wastewater.

Abstract: A peripheral module capable of interaction with a host system comprises a digital signal processor (DSP), a cache controller, and minimal or no resident memory for initial storage of instructions and data. The peripheral module utilizes the memory resources (e.g., ROM and RAM) of a host system. The cache controller interfaces to the DSP and provides an instruction and data stream, upon request, from a resident cache. A bus interface unit arbitrates access to the host system via a host bus for access to host system resources by the cache controller for extracting DSP information (e.g., instructions and data) from the host system for utilization by the DSP within the peripheral module. The cache controller and cache thereby provide the instruction and data stream as required by the DSP for digital signal processing applications and relieve the need for resident storage within the peripheral module.