Patents by Inventor Phil-Seong Chun

Phil-Seong Chun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7656833
    Abstract: A wireless communication system, apparatus and a method for compensating offset using the same are disclosed, in which offset due to latency in a power save mode is compensated. The wireless communication apparatus includes a frequency matched unit for compensating offset due to latency that may occur during communication between the wireless communication apparatus and external equipment. The frequency matched unit adds a predetermined time to a clock value of a system clock if power save mode is transited to normal mode. Thus, the offset generated can efficiently be compensated if the power save mode is transited to the normal mode.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: February 2, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Phil-Seong Chun
  • Publication number: 20070140154
    Abstract: A wireless communication system, apparatus and a method for compensating offset using the same are disclosed, in which offset due to latency in a power save mode is compensated. The wireless communication apparatus includes a frequency matched unit for compensating offset due to latency that may occur during communication between the wireless communication apparatus and external equipment. The frequency matched unit adds a predetermined time to a clock value of a system clock if power save mode is transited to normal mode. Thus, the offset generated can efficiently be compensated if the power save mode is transited to the normal mode.
    Type: Application
    Filed: February 8, 2007
    Publication date: June 21, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Phil-Seong Chun
  • Patent number: 7193976
    Abstract: A wireless communication apparatus and a method for compensating offset using the same are disclosed, in which offset due to latency in a power save mode is efficiently compensated. The wireless communication apparatus includes a frequency matched unit for compensating offset due to latency that may occur during communication between the wireless communication apparatus and an external equipment. The frequency matched unit adds a clock value corresponding to predetermined frames to a clock value of a system clock if any one of a hold mode, a sniff mode, or a park mode is transited to a normal mode. Thus, the offset generated in the frames can efficiently be compensated if the hold mode, the sniff mode or the park mode is transited to the normal mode.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: March 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Phil-Seong Chun
  • Publication number: 20030128741
    Abstract: A wireless communication apparatus and a method for compensating offset using the same are disclosed, in which offset due to latency in a power save mode is efficiently compensated. The wireless communication apparatus includes a frequency matched unit for compensating offset due to latency that may occur during communication between the wireless communication apparatus and an external equipment. The frequency matched unit adds a clock value corresponding to predetermined frames to a clock value of a system clock if any one of a hold mode, a sniff mode, or a park mode is transited to a normal mode. Thus, the offset generated in the frames can efficiently be compensated if the hold mode, the sniff mode or the park mode is transited to the normal mode.
    Type: Application
    Filed: September 20, 2002
    Publication date: July 10, 2003
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Phil-Seong Chun
  • Patent number: 5786779
    Abstract: A digital-to-analog (D/A) converting apparatus for converting digital data to an analog signal is provided. Specifically, the apparatus contains a sampling rate converting circuit, an interpolator, a digital sigma-delta demodulation circuit, and an analog D/A converter. The converting circuit inputs and converts the digital data into sampled digital data. Then the interpolator interpolates the sampled digital data to produce interpolated data. Also, the interpolator has an infinite impulse response (IIR) filter which performs an IIR filtering operation based on the sampled digital data to produce the interpolated data. The demodulation circuit inputs the interpolated data, performs a sigma-delta demodulation operation on the interpolated data, and outputs corresponding demodulated data. Then, the analog D/A converter converts the demodulated data to the analog signal. By using the interpolator and the demodulation circuit, the structure of the converting apparatus is relatively simple.
    Type: Grant
    Filed: August 8, 1996
    Date of Patent: July 28, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Phil-Seong Chun, Kwang-Yong Lee