Abstract: This disclosure is generally concerned with devices for determining photocurrent levels. One example of such a device is an optoelectronic transceiver that includes a laser and a photodetector. The photodetector is configured to receive an optical signal and generate a corresponding electrical signal. The electrical signal is received by a first stage circuit which then converts the received electrical signal to a differential output. Finally, a second stage circuit in communication with the first stage circuit is configured to derive an optical signal strength of the optical signal based upon the differential output received from the first stage circuit.

Abstract: A fiber optic transceiver or receiver having circuitry for detecting signal strength of a photo-diode therein is disclosed. In one embodiment, the photo-current generated by the photo-diode is provided to a pre-amplifier circuit. The pre-amplifier circuit generates differential signals including a first signal and a second signal whose difference is representative of the detected photo-current. The fiber optic receiver further includes a post-amplifier circuit that is coupled to the pre-amplifier circuit to receive the differential signals. In one embodiment, the post-amplifier circuit includes circuitry to accurately derive a signal strength of the photo-current from the differential signals.

Abstract: This disclosure is generally concerned with devices for determining photocurrent levels. One example of such a device is an optoelectronic device that includes a photodetector. The photodetector is configured to receive an optical signal and generate a corresponding electrical signal. The electrical signal is received by a pre-amplifier circuit which then converts the received electrical signal to a differential output. Finally, a post-amplifier circuit in communication with the first stage circuit is configured to derive an optical signal strength of the optical signal based upon the differential output received from the pre-amplifier circuit.

Abstract: This disclosure is generally concerned with devices for determining photocurrent levels. One example of such a device is an optoelectronic transceiver that includes a laser and a photodetector. The photodetector is configured to receive an optical signal and generate a corresponding electrical signal. The electrical signal is received by a first stage circuit which then converts the received electrical signal to a differential output. Finally, a second stage circuit in communication with the first stage circuit is configured to derive an optical signal strength of the optical signal based upon the differential output received from the first stage circuit.

Abstract: This disclosure is generally concerned with devices for determining photocurrent levels. One example of such a device is an optoelectronic device that includes a photodetector. The photodetector is configured to receive an optical signal and generate a corresponding electrical signal. The electrical signal is received by a pre-amplifier circuit which then converts the received electrical signal to a differential output. Finally, a post-amplifier circuit in communication with the first stage circuit is configured to derive an optical signal strength of the optical signal based upon the differential output received from the pre-amplifier circuit.

Abstract: A fiber optic transceiver or receiver having circuitry for detecting signal strength of a photo-diode therein is disclosed. In one embodiment, the photo-current generated by the photo-diode is provided to a pre-amplifier circuit. The pre-amplifier circuit generates differential signals including a positive differential signal and a negative differential signal whose difference is representative of the detected photo-current. The fiber optic receiver further includes a post-amplifier circuit that is coupled to the pre-amplifier circuit to receive the differential signals. In one embodiment, the post-amplifier circuit includes circuitry to accurately derive a signal strength of the photo-current from the differential signals.

Abstract: A fiber optic transceiver or receiver having circuitry for detecting signal strength of a photo-diode therein is disclosed. In one embodiment, the photo-current generated by the photo-diode is provided to a pre-amplifier circuit. The pre-amplifier circuit generates differential signals including a first signal and a second signal whose difference is representative of the detected photo-current. The fiber optic receiver further includes a post-amplifier circuit that is coupled to the pre-amplifier circuit to receive the differential signals. In one embodiment, the post-amplifier circuit includes circuitry to accurately derive a signal strength of the photo-current from the differential signals.

Abstract: A fiber optic transceiver or receiver having circuitry for detecting signal strength of a photo-diode therein is disclosed. In one embodiment, the photo-current generated by the photo-diode is provided to a pre-amplifier circuit. The pre-amplifier circuit generates differential signals including a positive differential signal and a negative differential signal whose difference is representative of the detected photo-current. The fiber optic receiver further includes a post-amplifier circuit that is coupled to the pre-amplifier circuit to receive the differential signals. In one embodiment, the post-amplifier circuit includes circuitry to accurately derive a signal strength of the photo-current from the differential signals.

Abstract: A low side, low voltage current sink circuit having improved output impedance to reduce effects of leakage current. A current sink circuit is described having a transistor having its emitter coupled to an emitter degeneration resistor which is coupled to the low side (e.g., ground) of a power supply. The output of the current sink is taken at the collector of the transistor. In one embodiment, the transistor is an NPN transistor device. The base of the transistor is coupled to the output of an operational amplifier. One input of the operational amplifier is coupled in a feedback loop to the emitter of the transistor. A direct current bias voltage is applied to the other input of the operational amplifier. In this arrangement, the output impedance (R″o) of the current is sink is based on the open loop gain of the operational amplifier (e.g., about 35 dB) and is therefore orders of magnitude larger than the output impedance of other prior art current sink designs.

Abstract: A differential charge pump for providing a low charge pump current. The present invention operates in one embodiment as part of an integrated circuit of a semiconductor chip by providing very small magnitude currents to other on-chip circuitry. Specifically, one embodiment of the present invention utilizes an R-2R resistor ladder circuit having moderate sized resistors to progressively reduce a large magnitude current into a very small magnitude current of accurate size. In this manner, available on-chip circuitry voltage can be used to produce the desired small magnitude of current without utilizing excessively large resistors, which can occupy too much die area. This is advantageous when dealing with specific types of on-chip components and circuitry which require accurate currents having very small magnitudes. For example, it may be desirable to integrate filter components (e.g., capacitors) on-chip together with accompanying phase lock loop (PLL) circuitry.

Abstract: A high side low voltage current source circuit having improved output impedance to reduce effects of leakage current. A current source circuit is described with a transistor having an emitter coupled to an emitter degeneration resistor which is coupled to a power supply voltage. The output of the current source is taken at the collector of the transistor. In one embodiment, the transistor is a PNP transistor device. The base of the transistor is coupled to the output of an operational amplifier. One input of the operational amplifier is coupled in a feedback loop to the emitter of the transistor. A direct current bias voltage is applied to the other input of the operational amplifier. The output impedance (R″o) of the current is source is based on the open loop gain of the operational amplifier (e.g., about 35 dB) and is therefore orders of magnitude larger than the output impedance of other prior art current source designs.

Abstract: A current source circuit for providing a stable current into a filter element of a phase-lock-loop circuit of a clock generator. The current source circuit comprises a first resistor coupled to a voltage supply. The emitter of a first transistor is coupled to the first resistor; the base is coupled to a bias voltage, and the collector is coupled to a capacitor. The capacitor forms part of the filter of the phase-lock-loop circuit. Current flows from the voltage supply through the first resistor and first transistor into the capacitor. A second transistor has a collector coupled to the capacitor; a base; and an emitter coupled to ground via a second resistor. The second transistor and resistor causes a fixed amount of current to be sinked from the capacitor. Leakage current flowing out of the capacitor due to the inherent Rcb impedance associated with the second transistor is directed to a path provided by a third transistor.

Abstract: A fast high side switch for hard disk drive preamplifiers requires very fast turn on time, very low impedance when the switch is “on” and very high impedance when the switch is turned “off”. Each of the embodiments described provide a low-impedance path between the “Boost Voltage” and “Switch Out” terminals of the hard disk drive preamplifier, i.e., connecting a boost-voltage to the inductor, and as required in such a system, the proposed circuits provide a turn-on time that is much faster than the rise-time of the write current.

Abstract: Higher write speeds in hard disk write preamplifiers require higher supply voltages. The voltage across an inductive write head, VL, is proportional to the value of inductance, L, and to the speed at which the write current is reversed, di/dt. Accordingly, the write current reversal time in inductive write-heads fundamentally depends on how large a voltage can be impressed across the write drive head. The proposed circuitry and method provides a voltage boost circuit for hard disk drive preamplifiers that satisfies the demand for improved rise-time while meeting the conflicting demand for maintaining a same supply voltage.

Abstract: A low side, low voltage current sink circuit having improved output impedance to reduce effects of leakage current. A current sink circuit is described having a transistor having its emitter coupled to an emitter degeneration resistor which is coupled to the low side (e.g., ground) of a power supply. The output of the current sink is taken at the collector of the transistor. In one embodiment, the transistor is an NPN transistor device. The base of the transistor is coupled to the output of an operational amplifier. One input of the operational amplifier is coupled in a feedback loop to the emitter of the transistor. A direct current bias voltage is applied to the other input of the operational amplifier. In this arrangement, the output impedance (R″o) of the current is sink is based on the open loop gain of the operational amplifier (e.g., about 35 dB) and is therefore orders of magnitude larger than the output impedance of other prior art current sink designs.

Abstract: A fast high side switch for hard disk drive preamplifiers requires very fast turn on time, very low impedance when the switch is “on” and very high impedance when the switch is turned “off”. Each of the embodiments described provide a low-impedance path between the “Boost Voltage” and “Switch Out” terminals of the hard disk drive preamplifier, i.e., connecting a boost-voltage to the inductor, and as required in such a system, the proposed circuits provide a turn-on time that is much faster than the rise-time of the write current.

Abstract: A hard disk drive write channel architecture improves the rise-time while utilizing a same supply voltage to provide a boosted voltage, thereby improving the rise-time only when it is needed. The voltage is then connected to the inductive write head through a switch after an appropriate delay, so as to compensate for the delay between the switching of Data line and the peaking of the voltage at the corresponding write terminal. In addition, the same delayed version of the Data line is applied to the inputs of the switching circuit to delay the signal inputs such that the delay timing matches appropriately.

Abstract: A buffer circuit having a high input impedance. The buffer circuit comprises an input lead, a first stage having a first emitter follower transistor and a first level shifter transistor, a second stage having a second emitter follower transistor and a second level shifter transistor, and an output lead coupled to said second stage. The first emitter follower transistor is coupled to the input lead and coupled to the first level shifter transistor. The first and second stage of the buffer circuit acts as a voltage follower. The second emitter follower transistor is coupled to the second level shifter transistor, while the second emitter follower transistor is coupled to the first emitter follower transistor. The buffer circuit has a high input impedance and very low leakage current. Hence, it is ideal for sampling filter components of a phase lock loop circuit within a high frequency clock generation circuit thereby reducing clock jitter.

Abstract: A current source circuit for providing a stable current into a filter element of a phase-lock-loop circuit of a clock generator. The current source circuit comprises a first resistor coupled to a voltage supply. The emitter of a first transistor is coupled to the first resistor; the collector is coupled to a capacitor which is part of the filter elements of the phase-lock-loop. Current flows from the voltage supply through the first resistor and first transistor into the capacitor. Leakage current flowing out of the capacitor due to the inherent Rcb impedance associated with the first transistor is directed to a path provided by a second transistor. The second transistor has an emitter coupled to the base of the first transistor and a collector coupled to the capacitor. The second transistor is biased such that the Rcb leakage current is directed back into the capacitor.