Abstract: Disclosed are cable types, including a type THHN cable, the cable types having a reduced surface coefficient of friction, and the method of manufacture thereof, in which the central conductor core and insulating layer are surrounded by a material containing nylon or thermosetting resin. A silicone based pulling lubricant for said cable, or alternatively, erucamide or stearyl erucamide for small cable gauge wire, is incorporated, by alternate methods, with the resin material from which the outer sheath is extruded, and is effective to reduce the required pulling force between the formed cable and a conduit during installation.

Abstract: Disclosed are cable types, including a type THHN cable, the cable types having a reduced surface coefficient of friction, and the method of manufacture thereof, in which the central conductor core and insulating layer are surrounded by a material containing nylon or thermosetting resin. A silicone based pulling lubricant for said cable, or alternatively, erucamide or stearyl erucamide for small cable gauge wire, is incorporated, by alternate methods, with the resin material from which the outer sheath is extruded, and is effective to reduce the required pulling force between the formed cable and a conduit during installation.

Abstract: Address generators for use in verifying an integrated circuit hardware design for an n-way set associative cache. The address generator is configured to generate, from a reverse hashing algorithm matching the hashing algorithm used by the n-way set associative cache, a list of cache set addresses that comprises one or more addresses of the main memory corresponding to each of one or more target sets of the n-way set associative cache. The address generator receives requests for addresses of main memory from a driver to be used to generate stimuli for testing an instantiation of the integrated circuit hardware design for the n-way set associative cache. In response to receiving a request the address generator provides an address from the list of cache set addresses.

Abstract: Address generators for use in verifying an integrated circuit hardware design for an n-way set associative cache. The address generator is configured to generate, from a reverse hashing algorithm matching the hashing algorithm used by the n-way set associative cache, a list of cache set addresses that comprises one or more addresses of the main memory corresponding to each of one or more target sets of the n-way set associative cache. The address generator receives requests for addresses of main memory from a driver to be used to generate stimuli for testing an instantiation of the integrated circuit hardware design for the n-way set associative cache. In response to receiving a request the address generator provides an address from the list of cache set addresses.

Abstract: Address generators for use in verifying an integrated circuit hardware design for an n-way set associative cache. The address generator is configured to generate, from a reverse hashing algorithm matching the hashing algorithm used by the n-way set associative cache, a list of cache set addresses that comprises one or more addresses of the main memory corresponding to each of one or more target sets of the n-way set associative cache. The address generator receives requests for addresses of main memory from a driver to be used to generate stimuli for testing an instantiation of the integrated circuit hardware design for the n-way set associative cache. In response to receiving a request the address generator provides an address from the list of cache set addresses.

Abstract: Address generators for use in verifying an integrated circuit hardware design for an n-way set associative cache. The address generator is configured to generate, from a reverse hashing algorithm matching the hashing algorithm used by the n-way set associative cache, a list of cache set addresses that comprises one or more addresses of the main memory corresponding to each of one or more target sets of the n-way set associative cache. The address generator receives requests for addresses of main memory from a driver to be used to generate stimuli for testing an instantiation of the integrated circuit hardware design for the n-way set associative cache. In response to receiving a request the address generator provides an address from the list of cache set addresses.

Abstract: Address generators for use in verifying an integrated circuit hardware design for an n-way set associative cache. The address generator is configured to generate, from a reverse hashing algorithm matching the hashing algorithm used by the n-way set associative cache, a list of cache set addresses that comprises one or more addresses of the main memory corresponding to each of one or more target sets of the n-way set associative cache. The address generator receives requests for addresses of main memory from a driver to be used to generate stimuli for testing an instantiation of the integrated circuit hardware design for the n-way set associative cache. In response to receiving a request the address generator provides an address from the list of cache set addresses.

Abstract: Address generators for use in verifying an integrated circuit hardware design for an n-way set associative cache. The address generator is configured to generate, from a reverse hashing algorithm matching the hashing algorithm used by the n-way set associative cache, a list of cache set addresses that comprises one or more addresses of the main memory corresponding to each of one or more target sets of the n-way set associative cache. The address generator receives requests for addresses of main memory from a driver to be used to generate stimuli for testing an instantiation of the integrated circuit hardware design for the n-way set associative cache. In response to receiving a request the address generator provides an address from the list of cache set addresses.

Abstract: Benzodiazepine derivative of formula (I), and pharmaceutically acceptable salts thereof, are found to be active against RSV.

Abstract: Recombinant DNA encoding a polypeptide precursor of the HN or F glycoprotein of Newcastle Disease Virus has been prepared and sequenced.

Abstract: A device for use in rendering a discarded pressurized can partly filled with a hazardous liquid disposable as non-hazardous waste that can be buried, by depressurizing the discarded pressurized can and collecting the hazardous liquid in a single safe reservoir includes a reservoir that has a top to which is affixed an upwardly extending hollow open-ended cylinder into which the pressurized can is inserted in an upright position. At the bottom of the hollow cylinder is a piercer for producing a hole in the bottom of the can. An inverted cylindrical cup is placed over the pressurized can and is forced downwardly against the top of the can, thereby creating a pressure in the can so that when the bottom of the can is pierced by the piercer, the hazardous liquid within the can will be expelled by the pressure and will flow into the reservoir.

Abstract: Sequential/interlace scan conversion of NTSC or PAL color television signals is effected by an encoder the output of which is connected to the input of scan conversion apparatus. Controllable phase shift means is included in either the color signal input or the subcarrier input of the encoder and is adapted to vary the phase of the modulated subcarrier for each line of the received color signal by an essentially integral number of quarter cycles in dependence upon the line number. The control is such that the conversion apparatus provides an encoded output signal with the color subcarrier in PAL or NTSC format. The invention can also be used in converting between different types of interlace systems.