Patents by Inventor Philip Anthony Coyle

Philip Anthony Coyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pad limited configurable logic device
    Patent number: 11374571
    Abstract: An integrated circuit provides a semiconductor die with I/O bond pads, a power bond pad, and a circuit ground pad. Each I/O bond pad is associated with an input circuit that has an input circuit output lead. Sets of digital logic functional circuitry on the die provide different digital logic functions. Each function includes logic input leads and logic output leads. Output circuits each have an output circuit in lead and an output circuit out lead. Strapping structures, such as vias, formed in the semiconductor die electrically couple input circuits to a selected set of digital logic functions and the selected set of digital logic functions to output circuit in leads. Upper level metal conductors couple output circuit out leads and selected I/O bond pads.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: June 28, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joao Carlos Brito, Philip Anthony Coyle
  • PAD LIMITED CONFIGURABLE LOGIC DEVICE
    Publication number: 20200412367
    Abstract: An integrated circuit provides a semiconductor die with I/O bond pads, a power bond pad, and a circuit ground pad. Each I/O bond pad is associated with an input circuit that has an input circuit output lead. Sets of digital logic functional circuitry on the die provide different digital logic functions. Each function includes logic input leads and logic output leads. Output circuits each have an output circuit in lead and an output circuit out lead. Strapping structures, such as vias, formed in the semiconductor die electrically couple input circuits to a selected set of digital logic functions and the selected set of digital logic functions to output circuit in leads. Upper level metal conductors couple output circuit out leads and selected I/O bond pads.
    Type: Application
    Filed: September 9, 2020
    Publication date: December 31, 2020
    Inventors: Joao Carlos Brito, Philip Anthony Coyle
  • Pad limited configurable logic device
    Patent number: 10804900
    Abstract: An integrated circuit provides a semiconductor die with I/O bond pads, a power bond pad, and a circuit ground pad. Each I/O bond pad is associated with an input circuit that has an input circuit output lead. Sets of digital logic functional circuitry on the die provide different digital logic functions. Each function includes logic input leads and logic output leads. Output circuits each have an output circuit in lead and an output circuit out lead. Strapping structures, such as vias, formed in the semiconductor die electrically couple input circuits to a selected set of digital logic functions and the selected set of digital logic functions to output circuit in leads. Upper level metal conductors couple output circuit out leads and selected I/O bond pads.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: October 13, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Joao Carlos Brito, Philip Anthony Coyle
  • PAD LIMITED CONFIGURABLE LOGIC DEVICE
    Publication number: 20200067509
    Abstract: An integrated circuit provides a semiconductor die with I/O bond pads, a power bond pad, and a circuit ground pad. Each I/O bond pad is associated with an input circuit that has an input circuit output lead. Sets of digital logic functional circuitry on the die provide different digital logic functions. Each function includes logic input leads and logic output leads. Output circuits each have an output circuit in lead and an output circuit out lead. Strapping structures, such as vias, formed in the semiconductor die electrically couple input circuits to a selected set of digital logic functions and the selected set of digital logic functions to output circuit in leads. Upper level metal conductors couple output circuit out leads and selected I/O bond pads.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 27, 2020
    Inventors: Joao Carlos Brito, Philip Anthony Coyle