Abstract: Systems, methods, and apparatus, including computer program products, for providing termination resistance in a memory module are provided. An apparatus is provided that includes a plurality of memory circuits; an interface circuit operable to communicate with the plurality of memory circuits and to communicate with a memory controller; and a transmission line electrically coupling the interface circuit to a memory controller, wherein the interface circuit is operable to terminate the transmission line with a single termination resistance that is selected based on a plurality of resistance-setting commands received from the memory controller.

Abstract: Systems, methods, and apparatus, including computer program products, for providing termination resistance in a memory module are provided. An apparatus is provided that includes a plurality of memory circuits; an interface circuit operable to communicate with the plurality of memory circuits and to communicate with a memory controller; and a transmission line electrically coupling the interface circuit to a memory controller, wherein the interface circuit is operable to terminate the transmission line with a single termination resistance that is selected based on a plurality of resistance-setting commands received from the memory controller.

Abstract: A system is provided for high-speed communication between a memory controller and a plurality of memory devices. A memory controller, and a plurality of memory devices are provided. Additionally, at least one channel is included for providing electrical communication between the memory controller and the plurality of memory devices, an impedance of the channel being at least partially controlled using High Density Interconnect (HDI) technology.

Abstract: A system, method, and apparatus are included for providing additional space between an integrated circuit package and a circuit board. An integrated circuit package is provided including a plurality of integrated circuit package contacts. Also provided is a circuit board in electrical communication with the integrated circuit package. Further, the integrated circuit package, the integrated circuit contacts, and/or the circuit board is configured for providing additional space between the integrated circuit package and the circuit board to position at least a portion of at least one component between the integrated circuit package and the circuit board.

Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.

Abstract: Systems, methods, and apparatus, including computer program products, for providing termination resistance in a memory module are provided. An apparatus is provided that includes a plurality of memory circuits; an interface circuit operable to communicate with the plurality of memory circuits and to communicate with a memory controller; and a transmission line electrically coupling the interface circuit to a memory controller, wherein the interface circuit is operable to terminate the transmission line with a single termination resistance that is selected based on a plurality of resistance-setting commands received from the memory controller.

Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.

Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.

Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.

Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.

Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.

Abstract: A sheet of material (21, 61, 81) formed for control bending along a bend line (23, 63) while maintaining a continuous web of material (26) across the bend line (23, 63). The sheet has at least one groove (22, 62, 82) formed therein with a central groove portion (24, 64, 84) extending in the direction of and positioned proximate to a desired bend line (23, 63). The groove is formed with a continuous web of material (26) at a bottom of the groove (22, 62, 82) and has a configuration defining at least one bending strap (27, 67) extending across the bending line (23, 63) at the end of the groove with a centerline (28) of the bending strap (27, 67) oriented obliquely across the bend line (23, 63) so that a balancing of the forces during bending of the web along the central portion (24, 64, 84) of the grooves and bending of the oblique bending strap occur and control the location of bending of the sheet.

Abstract: A process of forming bend-controlling structures, such as slits, grooves or displacements (22), in a sheet of material (21, 121, 221, 321, 421, 521, 621, 721). The bend-controlling structures (22) have central portions (26) extending substantially parallel to a desired bend line (23) on the sheet and end portions (27) which diverge away from the bend line (23). In one embodiment the process includes the step of forming the bending straps (24) between pairs of slit end portions (27) at a desired spaced apart distances along the bend line (23) with the straps (24) having a desired configuration, and the step of forming central portions (26) which connect the end portions (27) to complete the slits (22) using a separate die set. A plurality of end portion dies (51/54) can be used to produce end portions (27) of various shapes and straps (24) of various widths, and a single set of central portion forming dies (71/74) are used to connect the end portions (27).

Abstract: A method of preparing a sheet of material for bending along a bend line comprising the step of forming of at least one displacement in the thickness direction of the sheet of material with a portion of the periphery of the displacement closest to the bend line providing an edge and opposed face configured in position to produce edge-to-face engagement of the sheet on opposite sides of the periphery during bending. The forming step is preferably accomplished using one of a stamping process, a punching process, a roll-forming process and an embossing process. A sheet of material suitable for bending using the process also is disclosed, as are the use of coatings, shin guards and displacing the area of the sheet between bending inducing slits.

Abstract: An aircraft brake assembly incorporating components which are sensitive to heat and to contact with substances present in runway,.e.g., de-icer compositions and cleansing liquids. The assembly includes an external member to shield the components from the liquids. The external member may comprise a rigid or flexible, fluid-impermeable or porous material located to receive and retain the liquids. Heat generated through the use of the brake assembly may evaporate any liquid settled on the external member or at least discourage any liquid from settling thereon.

Abstract: A sheet of material (21, 61, 81) formed for control bending along a bend line (23, 63) while maintaining a continuous web of material (26) across the bend line (23, 63). The sheet has at least one groove (22, 62, 82) formed therein with a central groove portion (24, 64, 84) extending in the direction of and positioned proximate to a desired bend line (23, 63). The groove is formed with a continuous web of material (26) at a bottom of the groove (22, 62, 82) and has a configuration defining at least one bending strap (27, 67) extending across the bending line (23, 63) at the end of the groove with a centerline (28) of the bending strap (27, 67) oriented obliquely across the bend line (23, 63) so that a balancing of the forces during bending of the web along the central portion (24, 64, 84) of the grooves and bending of the oblique bending strap occur and control the location of bending of the sheet.

Abstract: A process of forming bend-controlling structures, such as slits, grooves or displacements (22), in a sheet of material (21, 121, 221, 321, 421, 521, 621,721). The bend-controlling structures (22) have central portions (26) extending substantially parallel to a desired bend line (23) on the sheet and end portions (27) which diverge away from the bend line (23). In one embodiment the process includes the step of forming the bending straps (24) between pairs of slit end portions (27) at a desired spaced apart distances along the bend line (23) with the straps (24) having a desired configuration, and the step of forming central portions (26) which connect the end portions (27) to complete the slits (22) using a separate die set. A plurality of end portion dies (51/54) can be used to produce end portions (27) of various shapes and straps (24) of various widths, and a single set of central portion forming dies (71/74) are used to connect the end portions (27).

Abstract: The invention pertains to a communication system (300) including one or more communication channels (10), each channel comprising a transmitter unit (20) and a receiver unit (40). Each transmitter unit (20) is connected through an optical fiber link (30) to its associated receiver unit (40). In operation, each receiver unit (20) receives payload data from its associated sending client and adds overhead data to the payload data to generate corresponding aggregate data (600). The aggregate data of each transmitter unit (20) is conveyed through the fiber link (30) to its associated receiver unit (40) which receives the aggregate data, decodes it to separate the payload data from the overhead data and then outputs the payload data to its associated receiving client. The receiver unit (40) interprets the overhead data and uses it for controlling and managing the payload data in the system (300).

Abstract: An aircraft brake assembly (1) incorporating components which are sensitive to heat and to contact with substances present in runway de-icer compositions, cleansing fluids and like liquids, the assembly (1) including external means (10) to shield the components from the liquids, said shielding means (10) may comprise a rigid or flexible, fluid-impermeable or porous material located to receive and retain such liquids. Heat generated through use of the brake assembly (1) may evaporate any liquid settled on said shielding means (10) or at least discourage any liquid from settling thereon.

Abstract: An optical communication system (10) and a method of operating the system (10) to reduce non-linear phenomena in optical fibre waveguides (60, 70) included within the system (10) are discribed. The communication system (10) comprises a plurality of nodes (20, 40) coupled together by optical fibre waveguides (60, 70) for guiding communication traffic bearing radiation between the nodes. The system (10) further comprises: an attenuator and associated optical amplifier (110, 120) for regulating radiation power of the communication bearing radiation at the first node to generate corresponding output radiation; an a coupler (130) for emitting the output radiation into the optical fibre waveguide (60) to propagate to a second node (70). A power monitor (210) is provided for measuring radiation power of the output radiation received at the second node after it has been conveyed through the waveguiding means and for generating corresponding power indicative data.