Patents by Inventor Philip B. Giangarra

Philip B. Giangarra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6144977
    Abstract: A programmable numeric converter (10) converts a floating point number to a fixed point format by selecting the proper offset. The mantissa is loaded with an implied value one into the least significant, or most significant, bits of the shifter (20). The programmable offset is added (24) to the exponent to determine the number of shifts to the mantissa bits. The number of bits of resolution necessary in the fixed point number is reduced because the offset can be programmed to move the decimal point to the left, or to the right, to provide accuracy wherever the significant digits are located. That is, the decimal point is moved left to provide more resolution in the fractional portion of the fixed point number for small numbers. Alternately, the decimal point is moved right to provide more resolution in the whole number portion of the fixed point number for large numbers.
    Type: Grant
    Filed: July 10, 1995
    Date of Patent: November 7, 2000
    Assignee: Motorola, Inc.
    Inventors: Philip B. Giangarra, James D. Dworkin
  • Patent number: 5611068
    Abstract: A controller for transferring data between operational stages in a computer is provided. The controller includes a shift register for receiving a scheduling word and a counter for generating an address which corresponds to a datum to be transferred. The controller can be pre-programmed with a scheduling word to effect execution overlap between the stages.
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: March 11, 1997
    Assignee: Motorola, Inc.
    Inventors: Philip B. Giangarra, Earl F. Carlow
  • Patent number: 5600581
    Abstract: A converter which may be used for implementing either logarithmic or inverse-logarithmic functions includes a memory, a multiplier, and an adder. The memory stores a plurality of pre-computed values which are used in an interpolation to estimate a logarithmic or inverse-logarithmic function over a domain of input signals.
    Type: Grant
    Filed: February 22, 1995
    Date of Patent: February 4, 1997
    Assignee: Motorola, Inc.
    Inventors: James D. Dworkin, Philip B. Giangarra, Stephen L. Smith