Patents by Inventor Philip Bailey
Philip Bailey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250130274Abstract: A semiconductor burn-in board configured for insertion into a chamber of a semiconductor burn-in machine includes a power regulator board and a testing board. The power regulator board includes a main power connector configured to receive main power from a semiconductor burn-in machine, a plurality of power supplies each configured to receive the main power from the main power connector and convert the main power to test power, and a pair of test power connectors for each power supply. The testing board is attached to the power regulator board and includes a plurality of device testing units. Each device testing unit is configured to receive the test power from at least one of the power supplies through at least one pair of the test power connectors and apply test signals to a semiconductor device received in the device testing unit.Type: ApplicationFiled: September 23, 2024Publication date: April 24, 2025Inventors: Aidan Michael Fawcett, Donald R. Olson, Philip A. Bailey, Adam Russel John Goldberg, Kevin R. Deters
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Patent number: 10650611Abstract: Systems and methods for creating, storing, and manipulating 3D objects in a software-supported virtual environment, without having to release new versions or renderings of the software-supported virtual environment, are disclosed. The system includes one or more graph files for defining particular 3D objects, where the one or more graph files define the object behavior in the software-supported virtual environment. A mobile application included in the system may receive the one or more graph files for displaying the 3D objects. A user of the mobile application may visually manipulate or configure the 3D objects, such as extending or rotating the 3D objects, which results in real-time adjustments to the one or more graph files, the display, and additional services such as price quoting.Type: GrantFiled: September 12, 2018Date of Patent: May 12, 2020Assignee: ATLATL SOFTWARE, INC.Inventors: Andrew McClain Hanold, Benjamin Cowles, Philip Bailey, Eric Wood, Eric Benn, Jeremy Batts, Zach Hixson, Renald Jean-Charles, Lucas Stertz, Justin Williams, Jonathan Faulhaber, Brian Sweet
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Publication number: 20140249367Abstract: The various embodiments of the present inventions provide stabilization devices and methods for use of the stabilization devices with minimally invasive gynecological procedures such as methods of preventing pregnancy by inserting intrafallopian contraceptive devices into the fallopian tubesType: ApplicationFiled: March 7, 2014Publication date: September 4, 2014Applicant: Bayer Essure Inc.Inventors: Mimi Nguyen, Rosendo Aguilar, Betsy Swann, Elisa J. Aldridge, Christopher A. Stout, Philip A. Bailey
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Publication number: 20080116860Abstract: A burn-in system includes a testing stage configured to stress test one an integrated circuit and a power stage having a voltage control mode and a current control mode. The power stage is configured to supply power to the testing stage. One embodiment of the power stage includes a pulse width modulator, a current control circuit and a voltage control circuit. The pulse width modulator is configured to generate a modulated power output that is coupled to the testing stage. The current control circuit is configured to produce a current error output signal that is based on a difference between a measured load current, which is indicative of the current that is supplied to the testing stage by the modulated power output, and target load current.Type: ApplicationFiled: November 20, 2006Publication date: May 22, 2008Applicant: Micro Control CompanyInventors: Philip A. Bailey, Kevin R. Deters
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Publication number: 20060293560Abstract: The various embodiments of the present inventions provide stabilization devices and methods for use of the stabilization devices with minimally invasive gynecological procedures such as methods of preventing pregnancy by inserting intrafallopian contraceptive devices into the fallopian tubesType: ApplicationFiled: June 24, 2005Publication date: December 28, 2006Inventors: Mimi Nguyen, Rosendo Aguilar, Betsy Swann, Elisa Aldridge, Christopher Stout, Philip Bailey
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Publication number: 20060277206Abstract: Techniques for reporting computer resource utilization data involve receiving metrics data relating to a computer system that includes multiple resources and identifying, based on the metrics data, resources that are over-utilized and resources that are under-utilized. A summary graphical report of the number of over-utilized resources and the number of under-utilized resources is generated, and a utilization graphical report is generated. The utilization graphical report includes a color-coded listing of over-utilized resources and under-utilized resources and a color-coded indication of utilization for each resource over multiple time periods including one or more predicted utilizations for a future time period. The summary graphical report is displayed, and the utilization graphical report is displayed using a user interface that supports automated manipulation of information in the graphical report in response to a user interaction.Type: ApplicationFiled: June 2, 2005Publication date: December 7, 2006Inventors: Philip Bailey, Barry Spies, Peter Poortman
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Publication number: 20060200546Abstract: Identifying computer resource utilization issues includes accessing resource utilization data for a computer system for a particular period of time. The resource utilization data for the particular period of time is based on resource utilization data collected while processes were running on the computer system. The resource utilization data for the particular period of time includes measurements of a metric of operation of a component of the computer system. Each measurement is associated with a period of time. Statistical analysis is performed on the resource utilization data to identify a range of normal measurements for the metric for the particular period of time included in the resource utilization data. Measurements of the metric of the resource utilization data for the particular period of time are compared with the identified range of normal measurements to identify measurements that are outside of the identified range of normal measurements.Type: ApplicationFiled: November 1, 2004Publication date: September 7, 2006Inventors: Philip Bailey, Peter Poortman
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Publication number: 20050120111Abstract: Identifying computer resource utilization issues includes accessing resource utilization data for a computer system for a particular period of time. The resource utilization data for the particular period of time is based on resource utilization data collected while processes were running on the computer system. The resource utilization data for the particular period of time includes measurements of a metric of operation of a component of the computer system. Each measurement is associated with a period of time. Statistical analysis is performed on the resource utilization data to identify a range of normal measurements for the metric for the particular period of time included in the resource utilization data. Measurements of the metric of the resource utilization data for the particular period of time are compared with the identified range of normal measurements to identify measurements that are outside of the identified range of normal measurements.Type: ApplicationFiled: November 1, 2004Publication date: June 2, 2005Inventors: Philip Bailey, Peter Poortman
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Publication number: 20040059970Abstract: A logic device test system having memory device testing capabilities includes vector storage memory which receives and stores test vectors from a system controller. An address sequencer controls retrieval of the test vectors from the vector storage memory. Data driver circuitry coupled to the vector storage memory receives the test vectors retrieved from the vector storage memory. The data driver circuitry further includes data drivers coupleable to and driving devices under test using the test vectors. The data driver circuitry further including driver formatting circuitry coupled to the data drivers and formatting test vectors provided to the data drivers. A plurality of format code save registers in the driver formatting circuitry save test vectors and selectively provide the test vectors to the data drivers for driving the devices under test.Type: ApplicationFiled: May 23, 2002Publication date: March 25, 2004Inventors: Daniel Lloyd Wieberdink, David Edwin Hesse, Philip A. Bailey, Harold Eugene Hamilton
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Publication number: 20030138026Abstract: The invention provides an temperature exposure indication accessory (10) which consists of an enclosure (12) having a transparent cover face (14). The enclosure (12) is fixed to packaging (18) of a frozen article. The enclosure (12) contains a substance that is transformable when exposed to any temperature below freezing point for a predetermined period of time such as parts (16, 20) formed of differently coloured iced water. The environmental conditions under which the parts (16, 20) will melt, mix and, accordingly change overall colour are approximately equivalent to the conditions under which the quality of the frozen article will be compromised.Type: ApplicationFiled: January 24, 2003Publication date: July 24, 2003Inventor: Philip Bailey Askeland
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Patent number: 5327076Abstract: A test signal generating system for providing test signals to electronic circuit components under test in a burn-in system, the test signal generating system having a timing arrangement for eliminating glitches from the test signals, The test signal generating system comprises a data generator, a timing generator and a format selector, each of which provides an input signal to a test signal selector, A first, second and third flip-flop are electrically connected to the data generator, timing generator and format selector, respectively. A fourth flip-flop is electrically connected to an output of the test signal selection means, Each of the flip-flops is triggered by the same clock.Type: GrantFiled: September 17, 1992Date of Patent: July 5, 1994Assignee: Micro Control CompanyInventor: Philip A. Bailey