Abstract: A cache store is provided in conjunction with a main store. Each location of the cache has a changed bit. A list is maintained of the addresses of those locations in the cache store which have been modified. When the list becomes full, the entry at the head of the list is read out and the corresponding data item is transferred from the cache to the main store. Thus, there are never more than a limited number of items in the cache awaiting transfer. To clear the cache of all modified items, each entry in the list is read out in turn and the corresponding items are transferred to the main store. The system reduces the amount of traffic between the cache and the main store and hence improves efficiency.

Abstract: An information storage arrangement comprising two random access memories. While one memory is being used for normal read/write access, the other is automatically cycled through so that each location can be reset. When a "reset" command is received, the roles of the two memories are interchanged, so that the one which has just been reset is now used for normal read/write access. This provides a very rapid reset facility. The invention is of particular use for storing validity marker bits for data items in a slave store.