Patents by Inventor Philip Butler

Philip Butler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160221345
    Abstract: A method of cleaning an electrostatic printhead which has one or more ejection tips from which, in use, ink is ejected, the method comprising: stopping a prior flow of ink to a region around the ejection tip(s) for, in use, printing; causing a pressure differential to occur at the tip region thereby causing the ink meniscus to retreat from the tip; and passing a rinse into the tip region to clean the tip.
    Type: Application
    Filed: September 24, 2014
    Publication date: August 4, 2016
    Inventors: Ewan Hendrik CONRADIE, Ian Philip Butler INGHAM, John Lawton SHARP, Ammar LECHEHEB, Jerzy Marcin ZABA
  • Patent number: 9006016
    Abstract: The present invention provides a method and apparatus for fabricating piezoresistive polysilicon on a substrate by low-temperature metal induced crystallization by: (1) providing the substrate having a passivation layer; (2) performing, at or near room temperature in a chamber without breaking a vacuum or near-vacuum within the chamber, the steps of: (a) creating a metal layer on the passivation layer, and (b) creating an amorphous silicon layer on the metal layer, wherein the metal layer and the amorphous silicon layer have approximately the same thickness; (3) annealing the substrate, the passivation layer, the metal layer and the amorphous silicon layer at a temperature equal to or less than 600° C. and a period of time equal to or less than three hours to form a doped polysilicon layer below a residual metal layer; and (4) removing the residual metal layer to expose the doped polysilicon layer.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: April 14, 2015
    Assignee: Board of Regents, The University of Texas System
    Inventors: Zeynep Celik-Butler, Suraj K. Patil, Donald Philip Butler
  • Publication number: 20150030947
    Abstract: A solid oxide fuel cell system (10) comprises a solid oxide fuel cell stack (12) and a gas turbine engine (14), a compressor (24) of the gas turbine engine (14) is arranged to supply oxidant to the cathodes (22) of the solid oxide fuel cell stack (12) and a fuel supply (32) is arranged to supply fuel to the anodes (20) of the solid oxide fuel cell stack (12). A portion of the unused oxidant from the cathodes (22) of the solid oxide fuel cell stack (12) is supplied back to the cathodes (22) of the solid oxide fuel cell stack (12). A portion of the unused fuel from the anodes (20) of the solid oxide fuel cell stack (12) is supplied to a combustor (52). A portion of the unused oxidant from the cathodes (22) of the solid oxide fuel cell stack (12) is supplied to the combustor (52) and the combustor (52) is arranged to supply exhaust gases to a first inlet (68) of a heat exchanger (66).
    Type: Application
    Filed: July 6, 2011
    Publication date: January 29, 2015
    Applicant: ROLLS-ROYCE FUEL CELL SYSTEMS LIMITED
    Inventors: Gary Saunders, Michele Bozzolo, Philip Butler, Gerard Agnew
  • Publication number: 20140091410
    Abstract: The present invention provides a method and apparatus for fabricating piezoresistive polysilicon on a substrate by low-temperature metal induced crystallization by: (1) providing the substrate having a passivation layer; (2) performing, at or near room temperature in a chamber without breaking a vacuum or near-vacuum within the chamber, the steps of: (a) creating a metal layer on the passivation layer, and (b) creating an amorphous silicon layer on the metal layer, wherein the metal layer and the amorphous silicon layer have approximately the same thickness; (3) annealing the substrate, the passivation layer, the metal layer and the amorphous silicon layer at a temperature equal to or less than 600° C. and a period of time equal to or less than three hours to form a doped polysilicon layer below a residual metal layer; and (4) removing the residual metal layer to expose the doped polysilicon layer.
    Type: Application
    Filed: June 24, 2013
    Publication date: April 3, 2014
    Applicant: Board of Regents, The University of Texas System
    Inventors: Zeynep Celik-Butler, Suraj K. Patil, Donald Philip Butler
  • Patent number: 8492238
    Abstract: The present invention provides a method and apparatus for fabricating piezoresistive polysilicon on a substrate by low-temperature metal induced crystallization by: (1) providing the substrate having a passivation layer; (2) performing, at or near room temperature in a chamber without breaking a vacuum or near-vacuum within the chamber, the steps of: (a) creating a metal layer on the passivation layer, and (b) creating an amorphous silicon layer on the metal layer, wherein the metal layer and the amorphous silicon layer have approximately the same thickness; (3) annealing the substrate, the passivation layer, the metal layer and the amorphous silicon layer at a temperature equal to or less than 600° C. and a period of time equal to or less than three hours to form a doped polysilicon layer below a residual metal layer; and (4) removing the residual metal layer to expose the doped polysilicon layer.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: July 23, 2013
    Assignee: Board of Regents, The University of Texas System
    Inventors: Zeynep Celik-Butler, Suraj K. Patil, Donald Philip Butler
  • Publication number: 20100102403
    Abstract: The present invention provides a method and apparatus for fabricating piezoresistive polysilicon on a substrate by low-temperature metal induced crystallization by: (1) providing the substrate having a passivation layer; (2) performing, at or near room temperature in a chamber without breaking a vacuum or near-vacuum within the chamber, the steps of: (a) creating a metal layer on the passivation layer, and (b) creating an amorphous silicon layer on the metal layer, wherein the metal layer and the amorphous silicon layer have approximately the same thickness; (3) annealing the substrate, the passivation layer, the metal layer and the amorphous silicon layer at a temperature equal to or less than 600° C. and a period of time equal to or less than three hours to form a doped polysilicon layer below a residual metal layer; and (4) removing the residual metal layer to expose the doped polysilicon layer.
    Type: Application
    Filed: August 14, 2009
    Publication date: April 29, 2010
    Applicant: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Zeynep Celik-Butler, Suraj K. Patil, Donald Philip Butler
  • Patent number: 7387366
    Abstract: A printhead comprising: a housing having an inlet for the supply of ink; an array of ejection locations for the ejection of ink droplets; an ink supply pathway for the passage of ink from the inlets to the ejection locations, wherein the ink supply pathway comprises at least one divergent ink manifold; and an outlet manifold for receiving ink from the ejection locations.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: June 17, 2008
    Assignee: Tonejet Limited
    Inventors: Ian Philip Butler Ingham, Sebastien Eric Bregeaud, Daniel Richard Mace, Keith Turner
  • Publication number: 20060099117
    Abstract: A reformer module (10) comprises a hollow support member (12) having at least one passage (14) extending longitudinally therethrough. The hollow support member (14) has an external surface (20), a barrier layer (22) arranged on at least a portion of the external surface (20) of the hollow support member (12), a catalyst layer (24) arranged on the barrier layer (22) and a sealing layer (26) arranged on the catalyst layer (24) and the external surface (20) of the hollow support member (12) other than the at least a portion of the external surface of the hollow support member (12). By providing the barrier layer (22) and the catalyst layer (24) on the exterior surface (20) of the hollow support member (12), the distribution of the barrier layer (22) and/or the catalyst layer (24) may be more precisely controlled and thus a non-uniform distribution of barrier layer (22) and/or catalyst layer (24) may be achieved.
    Type: Application
    Filed: December 21, 2005
    Publication date: May 11, 2006
    Inventors: Gerard Agnew, Robert Cunningham, Philip Butler, Robert Collins