Abstract: Techniques to improve the immunity of wireless battery systems by transmitting heavily-coded signals, e.g., using multiple chips of a sequence for each bit of information, to trade data rate for interference or jamming immunity as a response once a noisy environment is identified. The techniques provide the system with a noise immunity operating mode (or high-immunity transmit and receive mode) that can improve resilience to interference or jamming by reducing the data rate. One option for reducing the data rate is by slowing down the transmission bit rate to reduce the occupied transmit bandwidth to minimize the probability of collisions with interfering signals. Another option is though digital coding methods using Forward Error Correction such as Convolutional Coding, Reed-Solomon Coding and Turbo coding. A third option is with RF spread spectrum techniques such as Direct Sequence Spread Spectrum (DSSS) or Frequency Hopped Spread Spectrum (FHSS).

Abstract: A radio frequency, RF, receiver circuit that is configured to simultaneously monitor a two or more different RF frequencies. The RF receiver circuit uses a sub-sampler to sub-sample an RF signal that is at any of the monitored RF frequencies, and the sub-sampled signal is then demodulated and a digital code that was encoded in the RF signal is recovered. The RF receiver circuit may be particularly low power, in part owing to using the same sub-sampler for each of the two or more monitored RF frequencies, and not relying on superheterodyning. Furthermore, monitoring two or more different RF frequencies simultaneously means that signals received on the monitored RF frequencies may be acted on very quickly. These characteristics make the RF receiver circuit particularly suitable for use in low-power wake-up receivers, such as Bluetooth Low Energy (BLE) wake-up receivers.

Abstract: A radio frequency, RF, receiver circuit is configured to simultaneously monitor a two or more different RF frequencies. The RF receiver circuit uses a sub-sampler to sub-sample an RF signal that is at any of the monitored RF frequencies, and the sub-sampled signal is then demodulated and a digital code that was encoded in the RF signal is recovered. The RF receiver circuit may be particularly low power, in part owing to using the same sub-sampler for each of the two or more monitored RF frequencies, and not relying on superheterodyning. Furthermore, monitoring two or more different RF frequencies simultaneously means that signals received on the monitored RF frequencies may be acted on very quickly. These characteristics make the RF receiver circuit particularly suitable for use in low-power wake-up receivers, such as Bluetooth Low Energy (BLE) wake-up receivers.

Abstract: A radio frequency, RF, receiver circuit that is configured to simultaneously monitor a two or more different RF frequencies. The RF receiver circuit uses a sub-sampler to sub-sample an RF signal that is at any of the monitored RF frequencies, and the sub-sampled signal is then demodulated and a digital code that was encoded in the RF signal is recovered. The RF receiver circuit may be particularly low power, in part owing to using the same sub-sampler for each of the two or more monitored RF frequencies, and not relying on superheterodyning. Furthermore, monitoring two or more different RF frequencies simultaneously means that signals received on the monitored RF frequencies may be acted on very quickly. These characteristics make the RF receiver circuit particularly suitable for use in low-power wake-up receivers, such as Bluetooth Low Energy (BLE) wake-up receivers.

Abstract: A radio frequency, RF, receiver circuit is configured to simultaneously monitor a two or more different RF frequencies. The RF receiver circuit uses a sub-sampler to sub-sample an RF signal that is at any of the monitored RF frequencies, and the sub-sampled signal is then demodulated and a digital code that was encoded in the RF signal is recovered. The RF receiver circuit may be particularly low power, in part owing to using the same sub-sampler for each of the two or more monitored RF frequencies, and not relying on superheterodyning. Furthermore, monitoring two or more different RF frequencies simultaneously means that signals received on the monitored RF frequencies may be acted on very quickly. These characteristics make the RF receiver circuit particularly suitable for use in low-power wake-up receivers, such as Bluetooth Low Energy (BLE) wake-up receivers.

Abstract: A system and method for monitoring components of a vehicle includes a manager and a wireless node. The manager is positioned on the vehicle and configured to wirelessly transmit a wake signal in response to an event. The wireless node positioned to monitor a component of the vehicle and includes an antenna, a wakeup circuit, and a node transceiver. The wakeup circuit is connected to the antenna and configured to monitor for the wake signal, and the node transceiver is configured to perform wireless communication with the manager. The wakeup circuit is configured to power on the node transceiver upon receipt of the wake signal.

Abstract: Systems and methods for analog finite impulse response (FIR) filters are provided. In certain embodiments, a receiver includes a cascade of a mixer, an analog FIR filter, and an analog-to-digital converter (ADC). By including the analog FIR filter along the signal path between the mixer and the ADC, design constraints of the ADC are relaxed. For example, the ADC can operate with relaxed specifications with respect to resolution and/or dynamic range when the analog FIR filter is included. The analog FIR filter can include a controllable transconductance circuit that delivers an integration current to a capacitor over an integration period, with the analog FIR filter's coefficients used to change the transconductance setting of the controllable transconductance circuit to different values over the integration period.

Abstract: Systems and methods for analog finite impulse response (FIR) filters are provided. In certain embodiments, a receiver includes a cascade of a mixer, an analog FIR filter, and an analog-to-digital converter (ADC). By including the analog FIR filter along the signal path between the mixer and the ADC, design constraints of the ADC are relaxed. For example, the ADC can operate with relaxed specifications with respect to resolution and/or dynamic range when the analog FIR filter is included. The analog FIR filter can include a controllable transconductance circuit that delivers an integration current to a capacitor over an integration period, with the analog FIR filter's coefficients used to change the transconductance setting of the controllable transconductance circuit to different values over the integration period.

Abstract: This disclosure relates to fractional-N phase-locked loops. A digital filter can filter out quantization noise from a modulator. Separate paths can process an integer part associated with an output signal of the digital filter and a fractional part associated with the output signal of the digital filter. The separate paths can be combined in the fractional-N phase-locked loop, for example, as a weighted sum.

Abstract: RF communication systems that provide combined demodulation and despreading are provided herein. In certain embodiments, an RF communication system generates an in-phase (I) signal and a quadrature-phase (Q) signal based on processing a received spread spectrum signal carrying a sequence of data symbols. The data symbols each have a symbol period and are coded by one or more multi-bit spreading codes. The RF communication system includes a symbol correlator that delays the I signal and the Q signal by an integer number of symbol periods to thereby generate a delayed I signal and a delayed Q signal, respectively. Additionally, the symbol correlator generates a correlation signal based on correlating the delayed I signal to the I signal and correlating the delayed Q signal to the Q signal. The RF communication system processes the correlation signal to recover the sequence of data symbols.

Abstract: This disclosure relates to fractional-N phase-locked loops. A digital filter can filter out quantization noise from a modulator. Separate paths can process an integer part associated with an output signal of the digital filter and a fractional part associated with the output signal of the digital filter. The separate paths can be combined in the fractional-N phase-locked loop, for example, as a weighted sum.

Abstract: Clock systems with phase noise compensation are provided herein. In certain implementations, a clock system includes a phase noise detector for detecting a phase noise of a clock signal, and an adjustable delay circuit for generating an adjusted clock signal based on delaying the clock signal with a controllable delay. Additionally, the phase noise detector generates an error signal indicated the phase noise of the clock signal, and controls the delay of the adjustable delay circuit with the error signal over time to thereby compensate the clock signal for phase noise. Thus, the adjusted clock signal has reduced phase noise compared to the clock signal.

Abstract: Clock systems with phase noise compensation are provided herein. In certain implementations, a clock system includes a phase noise detector for detecting a phase noise of a clock signal, and an adjustable delay circuit for generating an adjusted clock signal based on delaying the clock signal with a controllable delay. Additionally, the phase noise detector generates an error signal indicated the phase noise of the clock signal, and controls the delay of the adjustable delay circuit with the error signal over time to thereby compensate the clock signal for phase noise. Thus, the adjusted clock signal has reduced phase noise compared to the clock signal.