Abstract: Described is a method for forming a stackable interconnect. The interconnect is formed by depositing a first contact on a substrate; depositing a seed layer (SL) on the substrate; depositing a metal mask layer (MML) on the SL; depositing a bottom anti-reflection coating (BARC) on the MML; forming a photoresist layer (PR) on the BARC; removing a portion of the PR; etching the BARC and the MML to expose the SL; plating the exposed SL to form a first plated plug; removing the layers to expose the SL; removing an unplated portion of the SL; depositing an inter layer dielectric (ILD) on the interconnect; etching back the ILD to expose the first plated plug; and depositing a second contact on the first plated plug. Using the procedures described above, a second plated plug is then formed on the first plated plug to form the stackable plugged via interconnect.

Abstract: A solder bump structure for use on a substrate. The solder bump structure includes a multilayer underbump metallization having a major upper surface with a solder wetable caplayer for contacting a solder bump, the mutilayer underbump metallization projecting from the substrate with an exposed sidewall; a thin layer of a metal selected from a group consisting of titanium, chrome, a titanium-nickel-titanium composite, a titanium-nickel-chrome composite, a titanium-platinum-titanium alloy, and a titanium-nickel-oxidized silicon composite deposited over or under the multilayer underbump metallization and covering the exposed sidewall of the multilayer underbump metallization.